help on DFT flow

xiaoyisimonguo

need help
I using DFT labs DFTCompilerêμÑéÅàÑμ×êáÏ

the lab have two flows unmapped and mapped

I did run them both. According to lab instruction *Lab.pdf
all the D* violations would be fixed when I run set_dft_insertion_configureation and set_autofix_configuration
in one the *.tcl, settings_insert_dft.tcl

I noticed that I am getting the followings:

warning: Violations occurred during test design rule checking. (TEST-124)
Information: Test design rule checking completed. (TEST-123)
Warning: Clock information for all sequential cells of design is missing.  (TEST-374)
  Architecting Scan Chains
Warning: Scan chain 'chain0' has zero elements. (TEST-352)
Warning: Scan chain 'chain1' has zero elements. (TEST-352)
Warning: Scan chain 'chain2' has zero elements. (TEST-352)
Warning: Scan chain 'chain3' has zero elements. (TEST-352)
Warning: Scan chain 'chain4' has zero elements. (TEST-352)
Warning: Scan chain 'chain5' has zero elements. (TEST-352)



and all the D* violations are still there.

please help,

I did check the clock, pclk to those in D1 violations:
I have the following in settings_protocol.tcl
set_dft_signal -view existing_dft -type ScanClock -timing {45 55} -port {pclk sdr_clk sys_clk}

xiaoyisimonguo

回复 1# xiaoyisimonguo


   please help

xiaoyisimonguo

回复 1# xiaoyisimonguo

need help

xiaoyisimonguo

回复 1# xiaoyisimonguo


   any one could help?

chentao0801

请问这个问题怎么解决的？