在看最简单的打两拍的同步器(如图)时看到这样一句话:The signal crossing clock domains stays high and low for more than a two clock cycles in the new clock domain.A requirement of this circuit is that the signal needs to transition to its invalid state before it can become valid again.1:为什么需要保持两个时钟啊?表示不理解!
2:什么叫做invalid state?
1.同步器并不能保证信号跨时钟域failure的几率为0,只是尽可能降低出错概率,这里涉及到MTBF(Mean Time Between Failure)的计算,一般讲跨时钟域的文档都会提到。至于为什么是2个,我觉得是一个经验参数,一般来说,2个DFF的Synchronizer已经可以把出错几率(1/MTBF)降到很低(此结论有待考证),对一般系统足够了。
2.不知道。