45nm switch mode DC-DC converter

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A to 100 mA DC–DC Converter With 2.8-4.2 V Battery Supply for Portable Applications in 45 nm CMOS

Bandyopadhyay, S.;   Ramadass, Y. K.;   Chandrakasan, A. P.;   
Massachusetts Institute of Technology, Cambridge, MA, USA

This paper appears in: Solid-State Circuits, IEEE Journal of
Issue Date: Dec. 2011
Volume: 46 Issue:12
On page(s): 2807 - 2820
ISSN: 0018-9200
Cited by : 1
Digital Object Identifier: 10.1109/JSSC.2011.2162914  
Date of Publication: 06 September 2011
Date of Current Version: 21 November 2011
Sponsored by: IEEE Solid-State Circuits Society  

ABSTRACT

A DC-DC buck converter capable of handling loads from 20 $mu$A to 100 mA and operating off a 2.8–4.2 V battery is implemented in a 45 nm CMOS process. In order to handle high battery voltages in this deeply scaled technology, multiple transistors are stacked in the power train. Switched-Capacitor DC–DC converters are used for internal rail generation for stacking and supplies for control circuits. An $I$ –$C$ DAC pulse width modulator with sleep mode control is proposed which is both area and power-efficient as compared with previously published pulse width modulator schemes. Both pulse frequency modulation (PFM) and pulse width modulation (PWM) modes of control are employed for the wide load range. The converter achieves a peak efficiency of 75% at 20 $mu$A, 87.4% at 12 mA in PFM, and 87.2% at 53 mA in PWM.

[size=1.085em]附件包括：2011 isscc paper， 2011 isscc ppt,  2011 jssc 45nm smpc.rar (6.87 MB, 下载次数: 682 )

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