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本帖最后由 robberpk 于 2011-8-24 10:07 编辑
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  uvm.cookbook.pdf
            
            (9.12 MB , 下载次数:
                1185 ) 方法学只是方法学,是资本运作的产物,各位自己斟酌
 
 Table of Contents
 Articles
 Introduction 1
 Cookbook/Introduction 1
 Cookbook/Acknowledgements 2
 Testbench Architecture 3
 Testbench/Overview 3
 Testbench/Build 9
 Testbench/Blocklevel 17
 Testbench/IntegrationLevel 24
 Component 31
 Agent 34
 Phasing/Overview 39
 Factory 44
 UsingFactoryOverrides 47
 SystemVerilogPackages 50
 Connections to DUT Interfaces 53
 Connect/Dut Interface 53
 SVCreationOrder 58
 Connect/SystemVerilogTechniques 60
 ParameterizedTests 62
 Connect/Virtual Interface 65
 Config/VirtInterfaceConfigDb 71
 Connect/VirtInterfacePackage 75
 Connect/VirtInterfaceConfigPkg 77
 Connect/TwoKingdomsFactory 80
 VirtInterfaceFunctionCallChain 85
 BusFunctionalModels 87
 ProtocolModules 90
 Connect/AbstractConcrete 93
 Connect/AbstractConcreteConfigDB 96
 Configuring a Test Environment 102
 Config/Overview 102
 Resources/config db 106
 Config/Params Package 109
 Config/ConfiguringSequences 113
 ResourceAccessForSequences 116
 MacroCostBenefit 118
 Analysis Components & Techniques 119
 Analysis/Overview 119
 AnalysisPort 121
 AnalysisConnections 124
 MonitorComponent 129
 Predictors 132
 Scoreboards 134
 CoverageCollectors 140
 CoverageModelSwap 142
 MetricAnalyzers 146
 PostRunPhases 148
 End Of Test Mechanisms 150
 EOT/Overview 150
 Objections 152
 Sequences 155
 Sequences/Overview 155
 Sequences/Items 159
 Transaction/Methods 161
 Sequences/API 165
 Connect/Sequencer 169
 Driver/Sequence API 171
 Sequences/Generation 177
 Sequences/Overrides 183
 Sequences/Virtual 185
 Sequences/Hierarchy 191
 Driver/Use Models 194
 Driver/Unidirectional 195
 Driver/Bidirectional 197
 Driver/Pipelined 201
 Sequences/Arbitration 211
 Sequences/Priority 217
 Sequences/LockGrab 218
 Stimulus/Signal Wait 223
 Stimulus/Interrupts 226
 Sequences/Stopping 231
 Sequences/Layering 232
 Register Abstraction Layer 237
 Registers/Overview 237
 Registers/Specification 243
 Registers/Adapter 245
 Registers/Integrating 249
 Registers/Integration 255
 Registers/RegisterModelOverview 259
 Registers/ModelStructure 261
 Registers/QuirkyRegisters 269
 Registers/ModelCoverage 273
 Registers/BackdoorAccess 277
 Registers/Generation 280
 Registers/StimulusAbstraction 281
 Registers/MemoryStimulus 290
 Registers/SequenceExamples 294
 Registers/BuiltInSequences 299
 Registers/Configuration 303
 Registers/Scoreboarding 305
 Registers/FunctionalCoverage 310
 Testbench Acceleration through Co-Emulation 314
 Emulation/Overview 314
 Emulation/SeparateTopLevels 317
 Emulation/SplitTransactors 323
 Emulation/BackPointers 328
 Emulation/DefiningAPI 332
 Emulation/Example 335
 Emulation/Example/APBDriver 342
 Emulation/Example/SPIAgent 345
 Emulation/Example/TopLevel 349
 Appendix - Deployment 351
 OVM2UVM/Overview 351
 OVM2UVM/DeprecatedCode 355
 OVM2UVM/SequenceLibrary 356
 OVM2UVM/Phasing 358
 OVM2UVM/ConvertPhaseMethods 362
 UVC/UvmVerificationComponent 364
 Questa/CompilingUvm 374
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