高手帮我分析下代码MASH+sigma-delta-modulator

mustangyhz

初学verilog和MASH,写了个代码，仿真结果不对，高手帮我分析下：

`timescale 10ps / 1ps

module modulator(clk, rst, k_in, v_out);

input clk, rst;

input [28:0] k_in;

output [2:0] v_out;

reg [2:0] v_out;

reg [28:0] a1, a2, a3;

reg [2:0] a4, a5;

wire [28:0] s1, s2, s3, q1, q2, q3;

wire [2:0]
s4, s5, neg_a5, neg_a4;

wire [2:0] c1, c2, c3;

assign s1 = k_in + a1;

assign s2=q1 + a2;

assign s3=q2 + a3;

assign s4=c2+c3 + neg_a5;

assign s5=c1+s4 + neg_a4;

assign c1 = {2'b0,s1[28]};

assign c2 = {2'b0,s2[28]};

assign c3 = {2'b0,s3[28]};

assign q1={s1[27:0] };

assign q2={s2[27:0] };

assign q3={s3[27:0] };

always@(posedge clk or posedge rst)

begin
if(rst) a1<=29'h0;
else a1<=q1;

end

always@(posedge clk or posedge rst)

begin
if(rst) a2<=29'h0;
else a2<=q2;

end

always@(posedge clk or posedge rst)

begin
if(rst) a3<=29'h0;
else a3<=q3;

end

always@(posedge clk or posedge rst)

begin
if(rst) a4<=3'h0;
else a4<=s4;

end

always@(posedge clk or posedge rst)

begin
if(rst) a5<=3'h0;
else a5<=c3;

end

always@(posedge clk or posedge rst)

begin
if(rst)
begin
v_out<=3'b000;
end

else
begin
v_out<=s5[2:0];
end

end

assign neg_a5=~a5+1'b1;

assign neg_a4=~a4+1'b1;

endmodule

@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@

`timescale 10ps / 1ps

module test;

reg clk;

reg rst;

reg [28:0] k_dth;

reg [24:0] bout_sum, clk_sum, averange;

wire [2:0] bout;

modulator M1(clk, rst, k_dth, bout);

always #2 clk = ~clk;

initial

begin

bout_sum = 25'b0;
clk_sum = 25'b0;
averange = 25'b0;
clk = 1'b0;
k_dth = 29'b0;
rst = 1'b1;
#100000 k_dth = 29'b01000110011010011010110101000;rst=1'b1;
#1 rst=1'b0;
#100000 $stop;

end

always@(posedge clk or posedge rst)

begin
if (rst)
begin
bout_sum = 25'b0;
clk_sum = 25'b0;
averange = 25'b0;
end
else
begin
bout_sum = bout_sum + bout ;//这里肯定错了，bout是补码，有负数的：）
clk_sum = clk_sum + 1;
averange = {bout_sum}/clk_sum;
end

ende

endmodule

mustangyhz

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回复 1# mustangyhz


    我自己搞定了：

sli103105

thanks for sharing this,

kfxu

tks.............

michael5x

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ghjnever

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kuaiyu

回复 2# mustangyhz


   请问2楼图中所示是什么仿真软件？~~

xwcwc1234

tks.............

mustangyhz

回复 7# kuaiyu


    cadence+ius

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