Berkeley cpu design courses

xileito · 发表于 2007-4-3 01:27:39

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Lecture 1-1(1) The Mips Isa
Lecture 1-2(2) Single Cycle Datapaths
Lecture 2-1(3) Single Cycle Wrap-Up + VLIW
Lecture 2-2(4) Testing and Teamwork
Lecture 3-1(5) Timing
Lecture 3-2(6) Performance and Energy
Lecture 4-1(7) Pipelining I
Lecture 4-2(8) Pipelining II
Lecture 5-1(9) Pipelining III
Lecture 5-2(10) Midterm I Review Session
Lecture 6-1(11) VLSI
Lecture 7-1(12) Memory and Interfaces
Lecture 7-2(13) Cache I
Lecture 8-1(14) Cache II
Lecture 8-2(15) Virtual Memory
Lecture 9-1(16) Error Correcting Codes
Lecture 9-2(17) Advanced Processors I
Lecture 10-1(18) Advanced Processors II
Lecture 10-2(19) Advanced Processors III
Lecture 11-1(20) Buses,Disks,and RAID
Lecture 11-2(21) Networks and Routers
Lecture 12-1(22) Graphics Processors
Lecture 12-2(23) Synchronization

xileito · 发表于 2007-4-3 01:29:27

基础 lecture1-3 有15个部分

[ 本帖最后由 xileito 于 2007-4-3 01:37 编辑 ]

xileito · 发表于 2007-4-3 01:30:14

basic lecture1-3

xileito · 发表于 2007-4-3 01:32:20

basic lecture1-3

xileito · 发表于 2007-4-3 01:35:10

文件太多传的好累后面的pipeline 我分开压缩如果前面的太简单你可以直接下后面的

xileito · 发表于 2007-4-3 01:36:33

basic 1-3

xileito · 发表于 2007-4-3 01:37:58

basic 1-3

xileito · 发表于 2007-4-3 01:39:14

basic 1-3

xileito · 发表于 2007-4-3 01:40:48

basic 1-3

xileito · 发表于 2007-4-3 01:42:50

basic 1-3

Berkeley cpu design courses

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