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hello, I stumbled upon you question and here's my answer:
What is the DCO implementation? is it LC-based or Ring-Oscillator based?
However, you should check the frequency step across both the DAC and the cap control.
since the DAC is 8 bits so you have 256 words to simulate
since the cap control is 3 bits, you have 8 words to simulate
So the total number of simulations for (typical corner, room temp) will be 2048. You should assess the operation using that.
Assessing the operation is to check the frequency range, the curves overlap (across the cap control), and the step per lsb of DAC word
However, when checking linearity (DNL, INL) of the DAC, you only need to fix the cap control to one word (say 101) and sweep the dac word 0, 1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 127, 128, 255
Feel free to ask about anything related to ADPLL  |
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