Inside an Open-Source Processor - An Introduction to RISC-V 2021

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Inside an Open-Source Processor - An Introduction to RISC-V 2021

RISC-V is a free and open instruction set architecture (ISA). This means that ISA RISC-V itself does not require license fees, although individual implementations may charge. RISC-V ISA is managed by a non-profit foundation that has no commercial interest in the products or services that use it, and anyone can contribute to the RISC-V specification. RISC-V ISA is suitable for applications ranging from embedded microcontrollers to supercomputers. This book will first describe the 32-bit ISA RISC-V, including both the basic instruction set and most currently defined extensions.

The book then details the implementation of an open source ISA for embedded management applications. This implementation includes a basic instruction set, as well as a number of standard extensions. After completing the description of the CPU design, the project expands by including memory and some simple I/O operations. The resulting microcontroller will then be implemented on an affordable FPGA layout board (available in Elektor) along with a simple software application so that the reader can study the finished project.

Target audience:
The information presented here will be useful to a wide range of readers. Practising engineers who need an open source processor for a professional or amateur project will appreciate that the internal work of the project is fully documented and easy to modify. Students studying electrical engineering and computer science will benefit from a real-world design example, and this book (and project) can be used as a basis for projects adding RISC-Instructions and V modes that are not actually needed for embedded control applications. Experienced electronics enthusiasts will finally be able to realize their own processor, which they have always dreamed of.



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