vcs编译失败 unexpected termination

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starting vcs inline pass..

hashTable::detach can't find item Pad_D
Internal error in tool's source file "../......./include/hash.ii" line160.
please send these messages to vcs_support@synopsys.com.


An unexpected termination has occurred in /....../vcs_N-20xx/linux64/bin/vcs1 due to an assertion failure in the tool
Hostname  XXX


.....
---Stack trace follows:
[Thread debugging using libthread_db_enabled]
..
warning : cannot parse .gnu_debugdata section ; LZMA support was disabled at compile time
....
已经尝试了vcs2017 2018 2022，都是同样的结果，成功跑过一次，同样的case却跑不起来了，卡在编译。不知道是那里的问题，求助各位前辈。拜托了！

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99，有没有人帮帮

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       我是做混仿，顶层是verilog，把spice网表部分例化从verilog中改到test.v下，再把信号拉回到verilog里，就能正常仿真了，完全不理解为什么。