IEEE论文 Three-Stage Large Capacitive Load Amplifier

xinhunlei

Three-Stage Large Capacitive Load Amplifier with
Damping-Factor-Control Frequency Compensation
Ka Nang Leung, Philip K. T. Mok, Member, IEEE, Wing-Hung Ki, Member, IEEE, and
Johnny K. O. Sin, Senior Member, IEEE
Abstract—A novel damping-factor-control frequency compensation
(DFCFC) technique is presented in this paper with detailed
theoretical analysis. This compensation technique improves frequency
response, transient response, and power supply rejection
for amplifiers, especially when driving large capacitive loads.
Moreover, the required compensation capacitors are small and
can be easily integrated in commercial CMOS process.
Amplifiers using DFCFC and nested Miller compensation
(NMC) driving two capacitive loads, 100 and 1000 pF, were
fabricated using a 0.8-m CMOS process with Vtn = 0.72 V and
Vtp = 0.75 V. For the DFCFC amplifier driving a 1000-pF load,
a 1-MHz gain-bandwidth product, 51 phase margin, 0.33-V/s
slew rate, 3.54-s settling time, and 426-W power consumption
are obtained with integrated compensation capacitors. Compared
to the NMC amplifier, the frequency and transient responses of
the DFCFC amplifier are improved by one order of magnitude
with insignificant increase on the power consumption.

xinhunlei

论坛里应该是还没有的，三级运放的补偿，自己看，呵呵

semico_ljj

Three-Stage Large Capacitive Load Amplifier ,nice!

LAS.xs

kankan

new116

值得一看

sssh

谢谢分享

finerain

thanks for sharing

chenyingping

回复 1# xinhunlei


   看看