Test Generation of Crosstalk Delay Faults in VLSI Circuits @2018

2046 · 发表于 2022-10-31 23:17:20

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Crosstalk delay fault is induced in the circuit if the victim and aggressor lines have simultaneous transitions. Crosstalk is most frequently observed for long nets which may have multiple fanouts. Thus, a long net is capacitively coupled with multiple aggressors. Hence, test pattern generation algorithms need to generate test vectors to activate multiple aggressors coupled to a victim.

This book provides an introduction to the various crosstalk effects and describes the deterministic and simulation-based methods for testing crosstalk delay faults.

waley · 发表于 2022-11-1 08:35:19

thx fo share~

hamandu · 发表于 2022-11-1 09:27:06

谢谢分享

student321 · 发表于 2022-11-1 21:43:35

kankana

zhsh94 · 发表于 2022-11-2 07:24:41

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rnysun · 发表于 2022-11-14 15:59:04

thanks

dmf336 · 发表于 2023-1-17 14:53:07

谢谢分享，学习学习！

echoeswen · 发表于 2023-2-23 18:45:42

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echoeswen · 发表于 2023-2-23 18:49:02

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echoeswen · 发表于 2023-10-10 17:38:36

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[资料] Test Generation of Crosstalk Delay Faults in VLSI Circuits @2018

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