Test Generation of Crosstalk Delay Faults in VLSI Circuits @2018

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Crosstalk delay fault is induced in the circuit if the victim and aggressor lines have simultaneous transitions. Crosstalk is most frequently observed for long nets which may have multiple fanouts. Thus, a long net is capacitively coupled with multiple aggressors. Hence, test pattern generation algorithms need to generate test vectors to activate multiple aggressors coupled to a victim.

This book provides an introduction to the various crosstalk effects and describes the deterministic and simulation-based methods for testing crosstalk delay faults.