招聘集成电路验证工程师（verification engineer)

tiger_asic

工作地点 上海 / 北京 均可
    北京艾芯集成电路设计有限公司为世界一流集成电路设计公司提供设计服务，

DV Job Description:
    1.Develop the advanced verification solutions on Cadence’s Xcelium (Incisive) Verification product portfolio.
    2.The engineer is working with the team on the High-speed converter’s verification.
   
    Duties:
    1.Good understanding on digital design and verification flow 2.Good knowledge of advanced verification methodology like OVM/UVM/VMM 3.Familiar with Cadence’s Metric-Driven Verification Signoff(MDV) 4.Proficiency in System Verilog/System C 5.Familiar with Verification Components (UVC, VIP) 6.Familiar with Formal and Static Verification 7.Experienced in scripting language, such as Perl, C shell, Python
   
    Position Requirements:
    Essential Qualifications:
    1.BS degree with 3+ years of applicable experience, MS degree with 2+ years of applicable experience in electrical engineering, microelectronics, comparable engineering science or solid-state physics.
    2.The individual demonstrates strong communication, verbal and written. Requires good communication skills in English.
    Desirable Qualifications:
    1.Will have demonstrated hands-on experience and expertise with Cadence verification design tools or equivalent tools, flows and methodologies required to execute a verification project.
    2.Will have demonstrated successful completion of 2+ verification projects as a key contributor 3.Will have DSP or High-speed converter project verification experience

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