合肥招聘模拟设计、数字设计lead（5年左右即可）

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电源芯片公司    团队背景好   产品有一定市场占有率  利润不错  团队主要来自于TI
数字lead  合肥
Responsibilities:
?Work on the development of world advanced wireless charge or PMIC project
?Perform digital circuit designs including architecture, RTL coding, simulation, verification, synthesis, and layout support
?Perform test, evaluation and debugging of prototype ICs
?Design for test, design for quality, design for mass production
?Assist with top level mixed-mode simulations

Requirements:
?M.S. in electrical engineering or a related field; at least three years of significant hands-on technical experience in Verilog
?Strong experience in digital design implementation including architecture, logic and physical synthesis with constraints, timing analysis, gate level simulations
?Experience with Industry standard design tools for RTL synthesis and timing analysis
?Experience with embedded MCU, NVM, and RAM in advanced technologies
?Strong interpersonal and communication skills
?Experience with UVM is a plus
?Experience with P&R is a plus
?Experience in design prototyping, emulation and validation using FPGAs is a plus




资深模拟芯片设计工程师 上海 合肥
职位详情
Performance Objectives
1.Definition, modeling, design, and verification of highly integrated power-management ICs such as DCDC converters, LED drivers, linear regulators, and other types of analog/mixed-signal ASICs.
2.Ability to work at any level of the design is absolutely essential.
3.Implement full-featured behavioral models of complex analog/mixed-signal ICs.
4.Interface with test, product, and applications engineering to drive the design to a successful production release.
5.Provide technical leadership including mentoring less senior members of design team, contract design resources, and layout supervision.
6.Assist in silicon validation and lead troubleshooting efforts to root out unintended circuit behavior through simulation, FIB, and intensive laboratory debugging.
7.Close collaboration with product definition and system architecture groups.
Requirements
1.BS with 5+ years or MS/PhD with 3+ years of analog mixed-signal design experience preferably in the power-management application area.
2.5+ years of analog, mixed-signal IC design experience encompassing diverse areas such as: DC-DC conversion: switch-mode or linear regulators ADC/DAC PLL/CDR Continuous and discrete-time analog integrated filters I/O interfaces Analog test (DFT) interfaces
3.Proven track record of technical leadership including multiple products taken from specification through design, release, volume manufacturing, and field support.
4.Detailed knowledge of power conversion architectures and analytical methods highly desirable.
5.System modeling skills in SIMPLIS or Matlab highly desirable.
6.CAD tools: Must be familiar with Cadence Virtuoso CAD tool suite: schematic, layout, simulation and verification. Must be experienced with top-down analog behavioral modeling methodology including fluent use of Verilog-A/AMS as appropriate. Skill in design automation tools and scripting environments is essential. Familiarity with Verilog and digital design and verification is a plus.




联系猎头katty  微信：361261541

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