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Job Title: Digital IP Verification Engineer Location: Wuhan The ideal candidate will have good background in FunctionalVerification.Verification expertise includes knowledge of verification concepts,verification planning, test case development and verifying the design undertest. Also the candidate should be able to analyze the coverage metrics andimprove them with definition of additional test cases. Job responsibilities: Include understanding connectivity protocols like DFI, JEDEC, AMBA, and working on the verification of designsin such protocols. Be able to implement test benches and test cases in HVLslike System Verilog is needed. The candidate will work in a project and team orientedenvironment with teams spread across multiple sites worldwide Requirements: Must have BSEE in EE at least, be familiar with one or moreof the following areas: Hands on experience with System Verilog coding andSimulation tools Prior ASIC/IP verification skills using UVM methodologies,with essential knowledge of System Verilog. Knowledge of OOPs concepts, C++ Knowledge of one or more of protocols: JEDEC/DFI/AMBA (AXI) Experience with Perforce for revision control along withPerl/Shell scripts is a plus.
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