一個非常詳細的Pipeline ADC博士論文

cowboy2000y · 发表于 2008-2-26 19:35:41

Traditional calibration methods for pipelined Analog-to-Digital Converters (ADC) cannot always generate acceptable results in modern sub-micron integrated circuit processes because of a downward trend in power supply voltage. The reduced headroom between maximum signal voltage and low power supply voltage rails causes amplifier non-linearity. This in turn may cause the corrected digital output to be non-monotonic. We present a modified calibration approach called Correction Factor at Actual Transition (CFAT) that always produces monotonic results. However, both the traditional and the CFAT approach produce limited improvement in integral non-linearity (INL) and effective number of bits (ENOB). We, therefore, present a second approach called True N Bit (TNB) calibration. With TNB, we insure a monotonic output, less than ½ LSB INL, and ENOB less than ½ LSB from the ADC’s theoretical resolution. These achievements are made with a full signal swing of 150mV from either rail of the 1.8V power supply.