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[招聘] AMD YES!上海北京苏州职位内推,目前公司快速扩张中,机会多多,快来上车。

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发表于 2019-5-19 19:41:52 | 显示全部楼层 |阅读模式

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如感兴趣,请发简历至内推专用邮箱:

amdrefer@sina.com

工作地点:上海

1 Sr. Business Development Manager-DataCenter team  Urgent!

任职要求

1. Direct and oversee all aspects of the GPU datacenterbusiness development functions for China/Asian datacenter customers

2. Understand customer h/w and s/w requirements,configurations, applications and architect solutions accordingly on GPU dataCenter

3. Cultivate, nurture and maintain relationships with keypersonnel within the customer organization

4. Participate as a member of business development team insharing market/customer knowledge and insights, as well as collaborate withcustomer regarding joint strategic direction and priorities.

5. Ensure proper communications to sales and product departments regarding changes in our customer business needs and expectations.


2 PMTS/SMTS/MTS/Sr Machine/ DeepLearning Software engineer  

任职要求

1.BS or higher degree in CS/EE/CE or equivalent

2.Strong programming skills in C or C++

3.Scripting language (Python, Perl ) knowledge andUNIX/Linux experience is required

4.Driver development experiment is a good Plus

5.OpenCL/CUDA/C++Amp/ROCm/Compiler development experienceis  a strong Plus




3  PMTS/SMTS/MTS/Sr. Silicon Design Engineer - PD

任职要求

1.Work with Physical Design team on Floor Plan, budgeting,timing closure, Signal Integrity, ECO flows, Power analysis, IO PAD placement,etc.

2.Should have expertise in: ICC2, Primetime, Calibre.

3.Expertise in Perl and Tcl is a must

4.Must have good communication & Analytical thinkingskills




4  SMTS/MTS Silicon Design Engineer - Synthesis/ timingengineer

任职要求

1.Closely Working with global IP design team and SOCphysical design team for ASIC chip synthesis

2.Focus on block synthesis to sign off timing and improvesynthesis netlist quality

3.Work with PD tile owners to improve place's QoR




5 SMTS/MTS/ Sr. Silicon Design Engineer- Feint

任职要求

1.Familiar with Verilog RTL design and has experience oflarge digital ASIC project.

2.Familiar with front-end EDA tools and flows (Designcompiler, PrimeTime, Conformal,Verde)

3.Familiar with unix/linux and scripts (tcl, perl etc.)




6  SMTS/MTS/Sr. Silicon Design Engineer - DV

任职要求

1.Have in depth knowledge and hands-on experience incomplex SoC design and functional verification

2.Expertise in UVM based verification methodology

3.Proficiency in System Verilog, C or C++

4.Expertise in Perl, Tcl or other scripting language

5.Knowledge of graphics architecture is a plus




7  SMTS/MTS/Sr. Silicon Design Engineer - DFT

任职要求

1.Familiar with Verilog HDL coding and ASIC Frond-Endimplementation flow

2.Computer architecture and computer arithmetic

3.Computer graphics basic knowledge

4.Experience with database technologies anddatabase-driven custom web application development

5.Familiar with Unix/Linux and scripts (TCL, Ruby, Perl,Python etc.)




8  PMTS/SMTS/MTS/Sr.  Linux OS Kernel Engineer

任职要求

1.MS degree in Electrical Engineering, Mathematics,Computer Science, or equivalent education background with more than 12 years'of working experience

2.Solid skill of of C/C++ programming

3.Solid experience of Linux kernel or Linux device driverdevelopment

4.Deep Knowledge of Computer Architecture and ComputerGraphics

5.Deep Knowledge of x86 assembler language and x86/x64 CPUinstructions


9  Game software developmer


任职要求

1.Work with the external game development partners toenable them to produce their applications as efficiently as possible




10 Data Center Sr/Program Manager


任职要求

1. 8+ years Program Management experience   

2. 2. Knowledge of Linux /Server Structure

3. Experience in Co-work with internal R&D team

4. Solid skill in Software/Machine learning background


11 PMTS/SMTS OpenGL Driver Software Engineer

任职要求

1. Work on next generation OpenGL/Vulkan technologies

2. Work on support for next generation Microsoft Windows,Linux and Android operating system

3. Maintain current driver and improve performance




12 MTS Validation Engineer

任职要求

1. Validation leader responsible for CPU, Graphic,Chipset, Memory and system features. Systems are integrated combinations ofhardware components (CPUs, graphics, memory, IO adapters, peripherals) andsoftware components (firmware, drivers, OS, virtualization, and systemmanagement). This individual will interface with the Marketing, Silicon design,Software and Hardware design, SEL/LSE and Validation teams to define ourvalidation strategy and drive validation execution for new silicon andplatforms, and provide detailed technical direction to the validationengineers.




13 MTS. Design Engineer (SMU)

任职要求

1.Work with domain architect and SOC architect onmicro-architecture definition

2.For SMU design, drive RTL implementation, for SMNdesign, drive netwrok topology design to achieve best performance/latency for agiven SOC floorplan

3.Collaborate with verification, feint, PD, software,platform team from an end-to-end ownership perspective

4.Support silicon bring-up and issue triage




14 Firmware Enginner - Display/Multimedia

任职要求

1.familiar with Linux/C/C++

2.haveknowledge on RTL.

3.Fluent inEnglish




15 IP Design and Verification Engineer

任职要求

1. Have in depth knowledge of entire design process fromDesign specification, defining architecture, micro-architecture, RTL design andfunctional verification

2. Goodknowledge of systemverilog and UVM verification

3. Familiarwith linux environment, skillful at script languages like perl, ruby, C shell,Makefile




16 SMTS Electroinc Design Engineer

任职要求

1.Design AMD Graphic reference boards and productionboards; including schematic design, components selection, cost control, andguide layout etc.

2.Provide and drive the platform solution by leading therelated design teams

3.Provide the technical guidance to customer support team

4.Drive innovation to optimize the designs




17 PMTS Silicon Design Engineer of GPU– SoCArchitect

任职要求

1.Minimum 10 years' progressive related experience andUnderstand silicon process technologies and the tools to project power &performance of the SOC

2.Very knowledgeable on the x86 platform architecture andStrong familiarity with graphics architecture is a plus

3.Familiar with the interface industry standardsspecifications is a plus




18 Software Manager of Machine Learning

任职要求

1. Bachelor’s or master’s degree in Computer Science or related field with at least10 years’ Software Engineering experience and 5 years’ Management experience

2. Experience in relevant technology, including 3Dgraphics, CPU/GPU driver development, GPGPU, or Machine Learning

3. C/C++ programming background in the Linux environment




19 Silicon Design SMTS Engineer of ISP

任职要求

1. Masters/Ph.D. degree in Electronics/ComputerEngineering with emphasis on multimedia domain of 10+ years of priorindustry/academic experience

2. Strong experience on C/C++/Matlab, Proficient inalgorithms of video/image processing

3. Experience on camera /ISP software, firmware oralgorithm design is preferred




20 MTS/Sr. Software engineer - Virtualization

任职要求

1. The candidate must have an undergraduate degree in arelated field (Computer Science, Computer/Software Engineering) with experiencewith complex software systems and architectures.

2. 8+ years industry experience with low level softwaredevelopment in C/C++

3. Experience with operating system development, low-leveldevice driver or embedded driver development strongly preferred and knowledgeof GPU and CPU architectures




21 PMTS/SMTS/MTS/Sr Machine Learning Software engineer  

任职要求

1. BS or MS or PhD in Computer Science, ElectricalEngineering, or Maths with working experience: BS 8+ years; MS 6+ years or PhD2+ years strongly preferred

2. Strong programming skills in C or C++ and scriptinglanguage (Python, Perl ) knowledge and UNIX/Linux experience is required

3. GPU programming experience in OpenCL, CUDA, HIP, orsimilar; practical experience optimizing a GPU-accelerated program




22 MTS - Software Engineer of Android Camera HAL

任职要求

1. Master degree in Electronic Engineering or ComputerScience with at least 5 year experience in AOSP, HAL and Linux kerneldevelopment

2. Proven skill on x86/ARM assembly and C/C++ language,demonstrable C/C++ programming skills

3. Solid experience with Kernel mode driver programmingunder Linux/Android OS and solid knowledge on AOSP/Linux Kernel/Linux V4L2architecture




23 SMTS/ MTS Silicon Design Verification Engineer - Graphics IP  

任职要求

1. Expert of Verilog RTL design and has experience oflarge digital ASIC project.

2. Familiar with front-end EDA tools and flows.

3. Familiar with C/C++ programming and unix/linux andscripts (tcl, perl etc.)


24 Sr./MTS/SMTS Silicon implementation Engineer   Urgent!

任职要求

1. MSEE with6+ years or Bachelor with 8+ years of industrial experience in ASIC design

2. 5+ yearsor more years of experience in physical or frontend design of deep submicrondigital ASIC chips

3. Hands onexperience in large scale ASIC chip physical design or frontend design.




25 MTS Design Verification Engineer (Low power)

任职要求

1. Have in depth knowledge of entire design process fromDesign specification, defining architecture, micro-architecture, RTL design andfunctional verification, synthesis, Physical Design, Timing closure, Tape-out,and post-Si debug.

2. Have hands-on experience in ChiplevelDesign/Integration activities.

3. Expertise in Perl and Tcl is a plus


26 SMTS Silicon Design Engineer

(Graphicsperformance Analysis & Architecture Modeling)  Urgent!

任职要求

1. GPU Performance architecture design and modeling

2. Co-Work with archtitecture design team and givefeedback and propose on architecture improvement

3. Lead real workload based performance verification,evaluation and analysis for new chip


27 GPU Compute Model Architect Urgent!

任职要求

1. Strong programming skills in C or C++

2. Strong background in computer architecture, parallelprocessing and/or high performance computing

3. Big plus with Computer Graphics, CPU, or DriverExperience


29 MTS Silicon Design Engineer

任职要求

1. Participate in SOC full Chip DFT feature andarchitecture definition

2. Responsible for DFT specification generation and review

3. Implement SOC DFT function including SCAN, BoundarySCAN, MBIST, Analog Macro test logic.

4. Perform verification on all DFT structures

5. Generate DFT related timing constraints and work withPD team for timing closure

6. Generate and verify DFT structural patterns andfunctional patterns

7. Design and implement other DFX (debug,characterization, yield etc) logics

8. 4+ years hands on working experience on ASIC DFT designand verification




30 MTS Silicon Design Engineer  

任职要求

1. Understand the architecture of the graphics IP andfunctional block being designed

2. Build C/C++ model for simulation

3. Build test bench and monitors for DUT

4. Compose test plan and validation vectors to ensurefunctional completeness

5. Debug function/performance bugs of graphics IP

6. Work with global Front-End design team and physicaldesign team for large scale ASIC chip physical implementation

7. Focus on physical design of deep sub-micron GPU chipsincluding block level (full chip) floor planning, timing closure,place&route, physical verification etc

8. Have in depth knowledge of entire design process fromDesign specification, defining architecture, micro-architecture, RTL design andfunctional verification, synthesis, Physical Design, Timing closure, Tape-out,and post-Si debug




31 Camera Algorithm Engineer

任职要求

1. Image, signal processing, Mathematics and related areaeducation background

2. Solid knowledge in mathematics and physics and expertin using mathematical method to resolve image processing problem

3. Expert in ISP pipeline architecture and principles andexpert in one of below areas: HDR, noise reduction, color space, de-mosaic,edge enhancement or 3A


32 Camera Tuning Tool Engineer

任职要求

1. Mastered at least one of the listed programminglanguages: C/C++, Java, Python, Matlab

2. Above 1 year’s softwaredevelopment experience under Windows/Linux

3. Strong analysis and problem solving skills, fastlearner on new technical area




33 Computer Vision Software Engineer

任职要求

1. Proven skill on C/C++/Python

2. Solid experience with  OpenCV//OpenCL/Matlab/CUDAor other framework and languages

3. 3+ year experience in Computer Vision development,familiar with Tensorflow, Caffe , Mxnet and ONNX is a plus




34 ISP Verification Engineer

任职要求

1. Familiar with ASIC Frond-End implementation flow andhands-on experience in ASIC design verification

2. Strong c/c++ programming skills is is highly desired

3. Experience with ISP or UVM or  SystemC and TLMwill be strong advantage




35 Sr Software Engineer

任职要求

1. Engaging customers directly to provide SW technicalsupport

2. Familiar with C++




如感兴趣,请发简历至内推专用邮箱:

amdrefer@sina.com

工作地点:北京




1  Silicon Physical Design Engineer - multiple levels

任职要求

1.MSEE or Bachelor with 3 – 20 ofindustrial experience in ASIC physical design

2.Experience in physical design of deep submicron digitalASIC chips

3.Successfully gone through several complete productdevelopment cycles




2  MTS SoC Design Verification Engineer

任职要求

1. Master with at least 5 years or Bachelor with at least8 years working experience in ASIC area, rich experience of complex ASIC DVflow from plan to coverage

2. Sincere interests in AI/HPC GPU projects

3. Knowledgeable in C++ & SV, familiar with scriptlanguages like Ruby/Perl/Makefile…


3  PMTS/SMTS/MTS/Sr Machine/ Deep Learning Softwareengineer


任职要求

1.Proficient C++ coding skill

2.Proficient debugging skill

3.In-depth knowledge on software engineering and designpattern

4.Ability to learn new techniques and features


4 Silicon Physical Design or DesignVerification Engineer


任职要求

1. 2+ years or more years of experience in Physical Designor Design Verification in digital IC design

2. Familiarwith low-power design

3. Familiarwith Front-End or Back-End EDA tools




工作地点:苏州




1  ATE Engineer

任职要求

1. Prefer experience with Verigy ATE test development

2. Prefer experience with ATPG Scan, Memory BIST, CrestFunctional test or HSIO test
3. Thorough understanding of device physics andsemiconductor Fab processing for advance technology nodes below 40nm.

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