上海外企招聘

17150875305

视频显示处理芯片公司招聘招聘岗位：ASIC Design (Front End)


要求:
1. Master/Ph.D Degree in Electrical/Communication Engineering or related fields.
2. Minimum 2 years industry SoC development experience. Video processing SoC design experience is preferred.
3. Fluent in Verilog, C/C++.
4. Familiar with clock, reset, low power design.
5. Experience in bus (AXI or OCP) fabric development, integration & performance optimization is a plus.
6. Experience in Perl/python is a plus.
7. Fluent speaking/writing in English and Good communication skill.


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微信：icresearcher