深圳AI初创企业 -ASIC RTL Design Engineer

Elevennong

Qualifications
- MS or PhD degree in Electrical Engineering, Computer Science, Physics,
Mathematics or equivalent disciplines.
- >5 years of IC design experience.
- Excellent RTL design skills with System Verilog.
- Good scripting skills with Python/Perl/Tcl.
- Solid understanding of low power optimization.
- English proficiency is highly preferred.
- Self-driven, result-oriented; able to multi-task and determine priorities.
- A proven fast learner and a team player.
- Knowledge and experience with RISC-V ISA is highly desired.

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Elevennong

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Elevennong

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