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We're hiring!! If you have interest, pls. send your resume to cherry.zhang@amd.com
Work Location: Shanghai
PREFERRED EXPERIENCE:
• BS-CS/BS-EE with at least 7 years' experience or MS with at least 5 years' experience in FPGA/RTL design
• Knowledge of PLD/FPGA design flow using Verilog/VHDL and EDA tools such as Xilinx and Altera
• Combined knowledge from board development (Digital or Analog) and ARM processor coding
• Familiar with lab equipment, such as oscilloscope, logic analyzer, spectrum analyzer
• Disciplined design approach, and ability to work smoothly with multi teams
• Strong individual analysis, problem solving skills and teamwork attitude
KEY RESPONSIBILITY:
• Build up the leading-edge debug infrastructure for AMD’s SOC systems.
• Develop the ultra-accuracy SOC dynamic power analyzing on an FPGA system, with deep engagement with hardware team’s platform development. Using existing or new developed algorithms for the very dynamic power (micro-second) captaining, filtering and analyzing automatically.
• Embedded ARM processor coding, together with the FPGA system and the entire systems (x86).
• Support SW/FW/algorithm development and debugging on FPGA platform
• Maintain FPGA platform, solve subsystem issues, and develop scrips or application for the work efficiency improvement.
• Collaborate and interface with local and global management to make accountable deliverables on time |
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