VCS 编译出错 不能生成simv文件

DALYS

VCS编译后的错误提示：


/usr/bin/x86_64-linux-gnu-ld: /home/dalys/software/synopsys/verdi/share/PLI/VCS/LINUXAMD64/pli.a(vcs_init.o): relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a PIE object; recompile with -fPIC
/usr/bin/x86_64-linux-gnu-ld: /home/dalys/software/synopsys/verdi/share/PLI/VCS/LINUXAMD64/pli.a(vcs_core_select.o): relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a PIE object; recompile with -fPIC
/usr/bin/x86_64-linux-gnu-ld: /home/dalys/software/synopsys/vcs/linux64/lib/vcs_save_restore_new.o: relocation R_X86_64_32S against undefined symbol `_sigintr' can not be used when making a PIE object; recompile with -fPIC
/usr/bin/x86_64-linux-gnu-ld: final link failed: Nonrepresentable section on output
collect2: error: ld returned 1 exit status
Makefile:107: recipe for target 'product_timestamp' failed
make: *** [product_timestamp] Error 1
Make exited with status 2
CPU time: .265 seconds to compile + .476 seconds to elab + .313 seconds to link[/code]

sunyongshuai

遇到了同样的问题，楼主有解决吗？

来自北方的狼

回复 1# DALYS


   楼主解决了吗，遇到同样问题