[Synaptics Inc.成都] layout/Test/DFT/Implementation/verification Engineer 高薪！

chasing

Location：成都市天府软件园天府路A区8幢6楼

内部推荐邮件：Kevin.liu@synaptics.com


Company Description
Synaptics is the pioneer and leader of the human interface revolution, bringing innovative and intuitive user experiences to intelligent devices. Synaptics’ broad portfolio of touch, display, biometrics, voice, audio, and multimedia products is built on the company’s rich R&D, extensive IP and dependable supply chain capabilities. With solutions designed for mobile, PC, smart home, and automotive industries, Synaptics combines ease of use, functionality and aesthetics to enable products that help make our digital lives more productive, secure and enjoyable. (NASDAQ: SYNA) www.synaptics.com.
Join Synaptics on Twitter, LinkedIn, and Facebook, or visit www.synaptics.com.

DFT Job Responsibilties

• DFT related rtl code will be a plus, include test mux, pin mux, test bus design and verification.
• DFT logic insertion will be a plus, scan, mbist, bsd, @speed scan, JTAG, etc.
• ATPG generation and simulation will be a plus.
• Support product testing and debug manufacture failures will be a plus.

– Responsibilities:

• BSEE/MSEE + 3-5 years hands on SOC implementation
• Good skill of English for reading, writing.
• Be familiar with Cadence/Synapsys tools, DFTC/ET, TetraMax.

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Implemetation Job Responsibilities

• System or block level synthesis, timing constraint/SDC develop, DFT logic insertion.
• Post-synthesis SDC/netlist quality check. signoff timing analysis and timing closure.
• LEC check, power analysis on rtl level and signoff level.
• Knowledge on Low power design will be a plus, UPF/CPF, power structure definition, VCLP check.

– Responsibilities:

• BSEE/MSEE + 3-5 years hands on SOC implementation
• Good skill of English for reading, writing.
• Clock and reset block design, dft and synthesis.
• Be familiar with Cadence/Synapsys tools, DC/Genus, ETS/PT, DFTC/ET, TetraMax, Conformal/Formality, EPS/PTPX.
• Experience on DFT, ATPG, CPF/UPF flow will be a plus.

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Verification Job Responsibilities
– Position title: SoC ASIC Verification Engineer
– Responsibilities:

• Instrumental in the development of infrastructure for the validation of ARM AMBA-based or DSP-based architectures and the verification of SoC/ASIC hardware.
• Additional duties include the development of directed and random hardware verification environments, and the application of those environments to SOC/ASIC verification
• Integration of VIP and functional verification agents in UVM verification environment to support coverage-driven verification

– Qualification:

• Verification experience on SoC or ASIC chips
• Experience with high level verification environments/languages such as UVM, VMM, SystemVerilog or Vera
• Experience developing bus functional models, monitors, scoreboards, generators, functional coverage models
• Strong C/C++ programming software background is preferred
• Shell scripts and Perl/Python expertise, create runsim, lsf, regression management scripts
• Able to understand Verilog/SystemVerilog RTL code, debug simulation errors, identify and fix RTL/Testbench issues
• Audio & voice DSP background is preferred

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Job Title: Senior Layout Engineer

Location: Chengdu

Company Description Synaptics Incorporated is a developer and supplier of custom-designed human interface solutions that enable people to interact with a range of mobile computing, communications, entertainment, and other electronic devices. The Company focuses on the personal computer (PC) market, primarily notebook computers, including ultrabooks, the markets for digital lifestyle products, including mobile smartphones and feature phones, the tablet market, and other select electronic device markets with its customized human interface solutions.

Job Responsibilities

• Work with analog designer to perform high performance analog circuit layout, including high performance PLL, ADC/DAC, Amplifier, BandGap, regulators, high speed I/O etc.
• Work with analog designer in module layout floor planning, integration.
• Work with project lead to do full chip floor planning, full chip integration, DRC/LVS/ERC verification, and tape out.

Required Qualifications

• BS with 3 years of experience or more IC analog layout experience. BS in electrical engineering is preferred.
• Good understanding of IC process fundamental
• Solid understanding and experience in key analog layout considerations such as device matching, parasitic, noise coupling, sensitive signal routing, current density and reliability considerations.
• Familiar with layout methodologies, flow and CAD tools such as Cadence virtuoso, PCELL layout, Calibre physical verification.
• Good communication skill in English

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Job Title: Sr.Test Engineer

Location: Chengdu, China : 1

Company Description

Synaptics is the leading worldwide developer of user interface solutions for mobile computing, communications and entertainment devices. Our mission is to enrich the interaction between users and their intelligent devices. Synaptics products emphasize ease of use, small size, low power consumption, advanced functionality, durability and reliability, making them applicable to a multitude of markets, including notebook computers, PC peripherals, mobile phones, and portable entertainment devices such as MP3 players.

Job Responsibilities

• Develop and deliver high quality automated test software to support manufacturing testing;
• Document test related software and processes plus provide training to deployed sites personnel;
• Troubleshoot and resolve issues which might be occurring in the test software, test firmware;
• Continuous optimization of test software to reduce test cycle time and test costs;
• Working with other testers, developers, or field application engineer to resolve issues

Required Qualifications

• 5+ years’ experience in software development on windows platform;
• Solid C/C++ program skill;
• Strong experience in C/C++ unit test.
• Strong experience in software debug, validation and improvement.
• Other program skill like Python, LabView preferred;
• Excellent skill to handle multiple projects on short deadlines in a fast-paced environment.
• Must be a good communicator with good interpersonal skills, a team player, and an analytical thinker.