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[招聘] Principal serdes design engineer

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发表于 2018-7-4 11:35:09 | 显示全部楼层 |阅读模式

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NO.73-【猎头职位:南京需要一位 Principal serdes design engineer】联系人:Raymond-Chen,邮箱:hr@kthr.com,微信也可查询职位了!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!

Job Description:

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Design, simulation andverification of high speed serdes at data rates of 10Gb/s and higher.

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High speed blocks AMSmodeling and support IP verification in digital top

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Define specifications of ICblocks and create design documentation.

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Design of IC blocks andsupervise layout floor plan.

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Silicon test,characterization and lab debugging.

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Knowledge sharing withindesign team

Job Requirement:

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MSEE or above with minimum5+ years of working/research experience in     high-speed CMOS SerDes design (CTLEs, PLLs,DFEs, etc.)

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Experience in high speeddesigns (e.g. USB3.0/3.1, PCIe, HDMI, SATA, DisplayPort, SerDes) preferred.

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Strong lab experience onsilicon debugging, good understanding on lab instruments (e.g oscilloscope,Error Bert)

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Good understanding ofhigh-speed layout considerations, such as parasitic, crosstalk isolation,supply and bias distribution, etc.

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Proficient with *** designenvironment and mixed-signal simulation (ADE, Layout, AMS), mixed-signalsimulation (AMS), EM simulation (such as EMX)

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Working knowledge oftheoretical and practical aspects of electro-magnetic structures includingtransmission lines, spiral inductors, resonant circuits, etc. (HFSS experienceis a plus)

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Able to assumeresponsibility for a variety of technical tasks and to work independently

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Able to be hands-on at alllevels of design, with the ability to verify, test, and characterize owndesigns

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Good communication skilland good command of written English are highly desired.

福利:美资13+bonus+五险公司缴纳+股票 KT二维码最小版.jpg

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