[上海IC公司招聘][工作地点：上海，北京，苏州，合肥]

fy_muyangren

hi 各位上海IC公司招聘，欢迎直接投简历到275246964@qq.com
1 数字验证与设计
Job Responsibilities:
Logic Verification Engineer is working on cuttingedge Digital and Mixedsignal IP
development for worldwide clients, including High Speed Serial Links, Protocols,
Memory Interface, etc. By employing the industry leading tools, state of the art
methodology, and innovative semiconductor leading technologies ranging from
32nm to 14nm and beyond, you will be participating in the frontend logic
verification or mixed signal verification.
Requirements:
1. ME/EE/CS or background in related areas.
2. Research and/or development experience in one or more of the following areas:
● Logic verification on the basis of the target system specification
● Mixed signal model verification on advanced technologies
● Proficiency in programming and/or scripting languages is a plus
● Knowledge on Protocols, High Speed Serdes or DDR is a plus
3. Experience in one or more of the following application domains, is a plus
● High performance computing system, processor, chipset and ASICs
● High end communication, networking, mobile and data center applications
● Digital signal processing, sensor and Internet of Things
● Other emerging IT technology and industry areas
4. Good English skills, communication skills, and willingness to work with a globalteam.
5. Good learning competency, selfmotivated, and ability to work in diverse areas in a flexible and dynamic environment

2 数字后端
Job Responsibilities:
Perform physical design implementation, including synthesis, floor planning,
power grid design, place and route, clock tree synthesis, timing closure,
power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR
signoff, DFM Closure, and physical design project management.
The candidate will have the opportunity to work on many varieties of challenging
designs, i.e. low power and high speed design. The responsibility includes
participating in or leading next generation physical design, methodology and flow
development.
Position Requirements:
1. BS degree with 5+ years of applicable experience, MS degree with 3+ years of
applicable experience in electrical engineering, microelectronics.
2. Experienced with ASIC design flow, hierarchical physical design strategies, and
methodologies and understand deep sub-micron technology issues.
3. Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/cross
talk analysis, formal verification, physical verification, DFM.
4. Successful track records of taping out complex, 65/40/28 nm SOC chips.
5. Automation and programming-minded, solid coding experience in
Makefile/Tcl/Tk/Perl.
6. Self-motivated, able to work independently or as a team player, excellent verbal
and written communication skills in English

3 DFT工程师
岗位职责：
负责 ASIC 芯片 DFT 设计及验证，在芯片测试成本、覆盖率、失效率、交付时
间上为量产测试和老化验证提供有竞争力的解决方案及测试向量，同时承载新
工艺的测试诊断，协助工艺问题快速定位。
任职要求：
1.
微电子、计算机、通信工程等相关专业，本科及以上学历；
2.
本科 5 年，研究生 3 年以上本领域工作经验；
3.
熟悉 IC DFT 或 IC 逻辑设计流程；熟练使用 Synopsys 或 Mentor 工具；
4.
数字 Boundary Scan, Scan Chain, ATPG, Memory BIST 等；
5.
有 90nm 以下先进工艺流片经验；
6.
有大规模高速设计经验优先考虑。

4 模拟版图工程师
职位描述:
1.全定制版图设计环境的建立；
2.标准单元，存储器，模拟电路的版图绘制和验证；
3.Layer Map 转换, 层次比对, tapeout 验证；
4.简化版图设计和提高版图设计质量和效率的脚本编写。
岗位职责：
1.与电路设计工程师合作，优化版图确保电路性能最优化；
2.完成版图物理验证，芯片尺寸估计，寄生参数提取，包括 DRC、LVS、ANT 等；
3.完成 Sign-off 流程及检查，编写版图设计文档；
4.在芯片开发的项目过程中，有良好的团队意识，确保产品的顺利进行。
任职要求：
1.本科或本科以上学历，电子/微电子相关专业；
2.三年以上标准单元、存储器版图设计相关工作经验，熟悉 IC 设计基本流程，能够独立进
行全定制 layout 工作，有实际 tape out 经验者以及顶层整合经验者优先；
3.熟悉 ESD、Latch Up 原理及相应的版图预防对策；
4.熟悉软件工具，例如 Cadence, Calibre, Synopsys 等；
5.熟悉 BiCMOS CMOS / BCD 半导体工艺及物理器件原理；
6.有混合信号经验者优先；
7.有先进工艺 40nm/28nm 等设计经验者优先；
8.具有良好的沟通能力和团队合作精神，吃苦耐劳；

fy_muyangren

补充一下，西安也有设计岗位需求。

YoungZ1

可以问哪一家吗？