MARVELL 招聘验证工程师

frustrate

junior  + senior+staff 都在招聘。有意向可以联系 CHINAXDWL@163.com
site:上海
谢谢～


Job Description
-Participate in high speed SERDES PHY design, such as PCIE, USB and SATA.
-Will be involved in the whole ASIC design flow from RTL coding through P&R support, which includes logic design, DFT planning and implementation, logic synthesis, power optimization, static timing analysis and sign-off.
-Will also work closely with analog design teams on IP integration, with P&R engineers on chip floor planning and timing optimization, and with product/test engineers on ATE tests. Work closely with frontend and backend design teams, as well as test engineers.
Job Requirement
-BS or MS in EE/CS
-Excellent knowledge of RTL design and verification.
-Hands-on experience with Verilog, C/C++, Perl, Tcl.
-Experience in PCIE,USB and SATA is a plus.

gaurson

这明显是芯片设计岗位。

liunf0618

有pcie验证的职位吗

frustrate

回复 2# gaurson


     JD 是从 51 上 copy 的 ， 招验证的。

gaurson

回复 4# frustrate


    发帖也要专业呀，啊哈哈。

frustrate

已经收到很多童鞋简历， 合适的老大会联系~

star_ic

回复  frustrate


    发帖也要专业呀，啊哈哈。
gaurson 发表于 2017-11-17 14:32

                               
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   顶你

jzcusst

回复 4# frustrate


   请问招应届毕业生吗？