Responsibility:
1. Work with circuit designer to complete module or chip layout design.
2. Verify layout design to meet the requirement of process and circuits implementation.
3. Cooperate with digital backend designer for necessary interface.
Requirement:
1. At least 2 years experience in layout design especially in high speed domain (PLL, Serdes, etcs.).
2. Good understanding of chip manufacture process and extensive tape-out experience.
3. Familiar with layout design flow and related CAD tools such as Virtuoso, Laker and other related verification tools.
4. Good cooperation ability with team and communication skills.tel: 010-82097363email: hr_analog@163.comQQ: 346767404