<猎头职位>数字电路设计工程师

年年爱喝粥

Description：
The candidate is expected as an experienced engineer, capable of making reality of IC design and implementation.
The person on this position will work closely with system team and marketing team, should be good at communication.
The products focus on high speed mixed signal transmission; panel control for monitor, TV, tablet or cell phone screen, including the related frameworks and services.

Job Description:
1.Responsible for architecture definition according to product specifications;
2.Logic design & implementation by Verilog on module level, and chip integration;
3.Design synthesis, timing analysis, DFT and ATPG;
4.Work closely with backend engineer for chip tape-out;
5.Work closely with application engineer for chip bring-up, debug and solve problem;
6.Good IC verification skills and basic knowledge of logic and circuit design, good communication and problem solving skills;
7.Experience with professional verification tools such as System Verilog, VMM/OVM/UVM or System C/Testbuilder, etc. Good knowledge of Perl and shell programming would be an added advantage.

Requirements:
1.Bachelor, Master or above in Electronic, Communications, Microelectronics Engineering and Computer Science;
2.At least 2+ years of experience in digital design based on high-level languages (preferable Verilog), with knowledge of ASIC FE design flow, including coding, simulation, verification, synthesis, DFT and STA;
3.Familiar with EDA tools from Synopsis, Cadence or Mentor, like NC-Verilog, VCS, DC and Prime Time;
4.Familiar with video/image process algorithm is a big plus;
5.Familiar with FPGA prototyping is a big plus;
6.Familiar with mixed signal or SoC design is a big plus;
7.Good written English communication skills.

工作地点：北京
薪酬范围：20~40万/年（根据水平经验而定）

联系方式：
电话：0755-61612608
手机：18676697072
微信：pyq15609690991
QQ：2419113193

年年爱喝粥

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