Memory 中的 scramble 的作用是什么

flow2000a

在memory中 对 addr 和 data 进行 scrambling 的作用的是什么 ？

John_Zhang

回复 1# flow2000a


    同问，求大神support

ustc12

原因是实际物理上的memory单元排布并不与逻辑地址体现的一致，要测比如相邻单元耦合一类的故障，就需要给MBIST工具提供scrambling/mappping信息，这会影响MBIST写读的地址顺序。data方面同理。
Frequently in memory designs, physically adjacent cells do not correspond to consecutive
external addresses. That is, the memory translates the supplied external address (logical
address) to some internal address (topological address) that it uses to access a specific memory cell. This translation is also known as address scrambling.
至于为什么memory设计physical与logical不一致：
In many cases, the physical arrangement of memory cells does not correspond to the assumed
logical arrangement, as a result of different memory design requirements. Some reasons for
these differences include the following:
• In order to deal with small memory cells, memory designers sometimes fit the periphery
cells in the pitch of more than one memory cell. For instance, they lay out sense
amplifiers in the pitch of 4, 8, or more memory cells, so they place the corresponding
bits of different words next to each other in the memory core, to be able to multiplex
these corresponding bits onto one common sense-amplifier circuit.
• In order to balance the load on different address lines or (pre)decoded lines, memory
designers sometimes scatter the wordlines or bitlines.
• In order to minimize the size of address and column decoders, as well as the length and
hence propagation times of row and column select lines, memory arrays are typically
divided into several sub-arrays.
• In order to increase the yield for larger memories, spare (redundant) rows and/or
columns are often implemented, which typically disrupt the physical address sequence.

happysnow01

请教 memory 中的 scramble 和 bitmap 有什么不同吗？

b50714006

ustc12 发表于 2018-3-26 16:37
原因是实际物理上的memory单元排布并不与逻辑地址体现的一致，要测比如相邻单元耦合一类的故障，就需要给MB ...

请教您 引用的这段解释出自哪本书，想找来看一看