how to break a timing loop

xiaoyisimonguo

I got the information saying timng loop detected: nformation: Timing loop detected. (OPT-150)
I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1/OEB1 I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1/IO1[16]

and a lot of warning saying

Warning: Disabling timing arc between pins 'OEB1' and 'IO1[16]' on cell 'I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1'
         to break a timing loop. (OPT-314)
Warning: Disabling timing arc between pins 'OEB1' and 'IO1[16]' on cell 'I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1'
         to break a timing loop. (OPT-314)



They looked that DC is suggesting that I could disabling timing arc between OEB1 and IO1[16] to break a timing loop

Please help, how do I do that, disabling timing arc between OEB1 and IO1[16]

swary

insert DFF in the timing loop

xiaoyisimonguo

回复 2# swary

Thank you for replyingCould you explain more in details how?

Change the source code?

swary

I have no experience about it. Only has a little information about. I work on front-end.