Job Description:- System integration;
- Simulation and verification of functionalities at both module and chip level;
- DFT strategy definition and implementation;
- ATPG pattern generation and validation;
- Synthesis and timing closure.
Qualification:
- 5+ year digital design experience;
- Strong RTL coding and verification capability;
- Hands-on experience on ASIC implementation flow and corresponding tools: DC, PT, etc;
- SoC project experience. Familiar with ARM or mips or x86 architecture. Basic assemble and C programming capability.
- Self-motivated and study capability;
- Familiar with mentor DFT flow is a plus;
- Low power design experience: UPF design or verification or implementation is a plus
有兴趣的可以发简历chao.zhou@montage-tech.com进一步沟通。