【AMD招聘】Sr. xGBE DV Engineer

RecruiterAMD

Job Responsibility:
•        XGBE IP level verification, including test-plan and test-bench develop, test-cases develop/debug, code coverage and functional coverage collection.
•        Support IP to SoC level integration, support Combo Whacker level test-bench and test-case develop.
Requirements:
•        The candidate is preferred to be EE/CS of related MSEE with minimum 5 years, or BSEE with minimum 7 years of ASIC/SoC verification experience.  
•        Strong RTL coding with Verilog, test-bench coding with SystemVerilog.
•        Good knowledge of design verification methodology, familiar with UVM/OVM/VMM.
•        Deep understanding of ASIC/SoC design and verification flow.
•        Have at least two kinds of following knowledge: 802.3 Ethernet Protocol, PCI-Express, PHY, AMBA AXI/AHB/APB.
•        Have low power or power aware experience is a strong plus.
•        Be good at script language, such as Perl, Python, Ruby, C Shell, Makefile.
•        Be good at both speaking and written English.
•        Be good at communication and teamwork, self-motivated and with good work ethics.

以太网相关的验证岗位，感兴趣的请将简历发送至tobias.gu@amd.com，谢谢。