【Synopsys武汉】招memory design engineer

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Hi all,
Synopsys武汉热招memory design engineer，以下JD供大家参考，感兴趣的朋友请投递简历到qyzhong@synopsys.com
感谢您的关注~

Job Title:Senior DesignEngineer (Sr DE) & Junior Design Engineer (Jr DE)

Location: Wuhan

Willbe responsible for design and development of memory compilers. It requires thecandidate to understand memory circuit design and key challenges at deepsub-micron nodes. The candidate will require working with the team in producingquality memory compilers, improving the current design, architecture and flows.Strong verbal and written communication skills are important.

Requirements:

• BSEE     minimum, MSEE preferred
  
• At     least 7+ years in custom circuit design role for Sr DE; 2+ years for Jr DE
  
• Expertise     in memory circuit design
  
• Exposure     to variation aware circuit design and analysis techniques
  
• Exposure     to high speed and low power memory design
  
• Exposure     to memory compilers will be a huge plus
  
• Understanding     of key design and layout challenges at smaller technology nodes
  
• Exposure     to FINFET technology nodes will be a huge plus
  
• Abilityto lead a team of engineers towards execution

    欢迎关注微信号：Synopsys招聘获取更多职位信息，谢谢！

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