初创IC公司（上海）技术团队招聘模拟IC、数字IC工程师、测试工程师

hs5582556

公司网址：http://www.photonic-tech.comHR邮箱：jobs@photonic-tech.com/sophia.yang@photonic-tech.com
公司待遇从优，提供股票期权，想了解详情的可以给我发站内。

Analog Design Engineer (Junior/Senior)

Job Description:
- You will perform analog and mixed signal design, characterization andevaluation of analog circuits such as:
   high-speed amplifiers, wireline transmitters, PLL, orother baseband circuits like LDO, temp sensor, ADC, Filters, etc.  
- You will optimize the design of high-frequency (multi-gigahertz) andhigh-precision analog circuits.
- Use EDA tools (Cadence, Mentor) to run simulation and functionverification.
- Guide layout engineer to optimize layout.
- Chip debug and testing individually.
- Design and optimize chip layout.

Qualifications:
- MSEE in analog IC design with 2 years’ experience.
- Experience in Cadence EDA tools.
- Team player with good communication skills.
- Experience with SERDES transmitter/receiver, TIA, CDR, LNA etc. ishighly preferred.
- Desired: Knowledge of advanced circuits such as PLLs, ADCs, DACs, LNAs,drivers, NF, S-parameters, BW extension.
- Desired: Experience in RF circuit design, testing, and post-siliconbring-up and evaluation.

Digital/asic Design Engineer (Junior/Senior)

Job description:

- This position is for a digital/ASICdesign engineer to build next-generation analog/mixed-signal SoC chipsets.
- Handle many aspects of ASIC design flow including: architecture, RTL coding,Verification, Synthesis, DFT, STA and P&R.
- Participate in chip debug, validation, and marketing specifications.

Qualifications:

- BSEE with minimum 3-year experience orMSEE with minimum 1-year experience of digital experience.
- Excellent knowledge of ASIC design, such as arithmetic structure (addition,multiplication), timing analysis, DFT, meta-stability, etc.
- Fundamental understanding of digital signal processing, such as FIR/IIRfilter structure, error correction, and decimation.
- Desired usage experience of several industry-standard EDA tools, such asVCS/NC, Design Compiler, PrimeTime, Formality/ Conformal and Tetramax/DFTcompiler.
- Experience in bus design (I2C, AHB or AIX), datapath design (Filter,correlation or Cordic) and logic control (PCS or MAS) is a plus.
- Experience in metrics-driven verification methodology (System-verilog/UVMbased) is a plus.
- Experience in several vertical aspects of ASIC design (front-end andback-end) will be a great plus.

Test/System Validation Engineer

Job Description:

- This job will evaluate and test several of our state-of-the-art high-speedSOC products. These include high-frequency multi-gigahertz analog/mixed-signalchips, with significant testing issues such as: channel cross talk,input-referred noise, phase noise, output bandwidth, power-supply noise,impedance matching.

Qualifications:

- Bachelor's degree with minimum 2 years’ experience as FAE, IC designer, ortest engineer.

- Experience and understanding of impedance matching, noise processes, phasenoise, multi-GHz performance.
- Occasionally (20%) be willing to travel to test lab and customer locations,testing our chips in their labs.
- Can read system datasheets, understand, and debug interactions betweendifferent blocks.
- Desired: previous experience with basic IC design, PCB prototyping, ICtesting.
- Desired: High-level system programming, such as C/C++, python/Perl, LabView,Matlab.
- Desired: Lab experience using oscilloscopes, signal/pattern generators, BERT,spectrum analyzer, AWG, BERT.
- Preferred: Experience with high-speed optical testing, including BERT, eyemask, jitter, optical coupling, etc.
- Preferred: Experience with interfacing with ATE and wafer-leveltesting/sorting.