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[招聘] 上海需要一位 ASIC Backend Design Engineer

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发表于 2016-6-22 11:34:02 | 显示全部楼层 |阅读模式

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【猎头职位:上海需要一位 ASIC Backend Design Engineer】联系人:Chloe-Zhang,邮箱:hr@kthr.com,微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!

Responsibilities:

1、Responsible for developing digital designs with emphasis on backend, including Floor-plan, power planning, Place, CTS and Route;

2、Work with Front-end designers to optimize timing/area/power of the design implementation and perform static timing analysis;

3、Optimization and Verification of layout for tape-out (including RC extraction, ECO, DRC, LVS);

4、Power IR drop analysis and optimization, area and parasitic layout optimization, chip size optimization;

5、Static Timing analysis (Prime Time) and setup/hold fix;

6、Formal Verification for equivalence checking (Formality);

7、Generation of fill structures according to technology requirements.


Requirements:

1、2-4 years experience in backend design flow (APR) with proven SOC tape-out experience;

2、Experienced in Synopsys/Cadence automatically physical implementation tools and flows (IC-Compiler/Astro / SOC-Encounter/ Milky-way/ Star-RCX) is a plus;

3、Experience with one or more scripting languages (Perl, TCL, or Shell) to make reusable automatically flow is a plus;

4、Experience and knowledge about FE design (RTL code, flow) and verification is a plus;

5、Good analytical and debugging skills;

6、Good command of English.

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