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数字前端IC工程师 @中关村
简历发 ic@hi-talent.com Description: The candidate is expected as an experiencedengineer, capable of making reality of IC design and implementation. The person on this position will workclosely with system team and marketing team, should be good at communication. The products focus on high speed mixedsignal transmission; panel control for monitor, TV, tablet or cell phonescreen, including the related frameworks and services.
Job Description: 1.Responsible for architecture definitionaccording to product specifications; 2.Logic design & implementation byVerilog on module level, and chip integration; 3.Design synthesis, timing analysis, DFTand ATPG; 4.Work closely with backend engineer forchip tape-out; 5.Work closely with application engineerfor chip bring-up, debug and solve problem; 6.Good IC verification skills and basicknowledge of logic and circuit design, good communication and problem solvingskills; 7.Experience with professional verificationtools such as System Verilog, VMM/OVM/UVM or System C/Testbuilder, etc. Goodknowledge of Perl and shell programming would be an added advantage.
Requirements: 1.Bachelor, Master or above in Electronic,Communications, Microelectronics Engineering and Computer Science; 2.At least 2+ years of experience indigital design based on high-level languages (preferable Verilog), withknowledge of ASIC FE design flow, including coding, simulation, verification,synthesis, DFT and STA; 3.Familiar with EDA tools from Synopsis,Cadence or Mentor, like NC-Verilog, VCS, DC and Prime Time; 4.Familiar with video/image processalgorithm is a big plus; 5.Familiar with FPGA prototyping is a bigplus; 6.Familiar with mixed signal or SoC designis a big plus; 7.Good written and oral Englishcommunication skills.
数字前端IC工程师@中关村简历发 ic@hi-talent.com (请以如上英文描述为准,中文仅供参考) 描述: 候选人可望作为一个经验丰富的工程师,能够使IC设计和实施的现实。 这一立场将与系统团队和市场营销团队紧密合作的人,要善于沟通。 该产品专注于高速数模混合信号的传输;面板控制显示器,电视,平板电脑或手机屏幕,包括相关的框架和服务。
职位描述: 1,负责根据产品的规格架构的定义; 2.Logic设计和模块级执行情况的Verilog和芯片集成; 3.Design合成,时序分析,DFT和ATPG; 与后端工程师芯片出带4.Work密切; 5.Work密切配合应用工程师芯片产品启动,调试和解决问题; 6,良好的IC验证技能和逻辑电路设计,良好的沟通和解决问题的能力的基本知识; 7.Experience专业的验证工具,如系统的Verilog,VMM / OVM / UVM或系统C / Testbuilder等Perl和shell编程的良好的知识将是一个额外的好处。
要求: 大学本科,电子,通讯,微电子工程和计算机科学硕士及以上学历; 2.At至少2年以上的基于高级语言(最好的Verilog),与ASIC FE设计流程的知识,包括编码,仿真,验证,综合,DFT和STA在数字设计经验; 3,熟悉从故事梗概,Cadence公司或导师,像NC-的Verilog,VCS,DC和黄金时段的EDA工具; 4,熟悉视频/图像处理算法是一大利好; 5,熟悉FPGA原型设计是一大利好; 6,熟悉混合信号和SoC设计是一大利好; 7。良好的书面和口头英语沟通能力
Backend Engineer数字后端@北京中关村
简历发 ic@hi-talent.com 1.相关IC后端设计经验; 2.负责芯片从Netlist到GDSII的物理设计流程; 3.熟悉布局布线、物理验证、功耗压降分析、寄生参数提取,DRC&LVS等物理设计流程; 4.有physically partition, floorplan the entire chip经验; 5.熟悉whole chip, block level, 从frontend到backend的时序分析,了解综合,形式验证,Netlist quality check; 6.要有40nm以下工艺经验; 7.有低功耗设计经验优先。
任职要求: 1.硕士以上学历,微电子、电子工程或相关专业; 2.1-3年工作经验; 3.具备良好的script skills; 4.能熟练使用Synopsys后端流程。
Best Regards Jane.Jin 金娟 Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd. 上海芯得企业管理咨询有限公司 上海芯相会企业管理咨询有限公司 Mob: 18502155252 E-Mail: Jane-Jin@hi-talent.com 微信: xinde_jane QQ: 1600548210 Weibo: http://weibo.com/u/1716864892 website:
www.hi-talent.cn
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