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SOC and Switch verification@新加坡
简历发 hr@hi-talent.com 1SOC and Switch verification 2 Work closely with the USA teams 3 Support chip tape out and bring up Requirements: 1 5+ years experience in ASIC Verification. 2 BS in Electrical Engineering (orequivalent) is a must have, MSEE is desired. 3 Working knowledge of networking protocolssuch as 802.3 and TCP/IP 4 Experience with switch engineverification. 5 System on Chip (SOC) VerificationExperience, including AHB/AXI, CPU, Interface integration verification. 6 Experience verifying interfaces such asPCIe, Ethernet, DDR and USB. 7 Verification tool experience – Verilog,System-Verilog, Coverage Analysis. 8 Must be familiar with various scriptinglanguages used in verification, including Perl, Csh, Make, etc. 9 Working knowledge of C programminglanguage. 10 Must be expert in Verilog RTL language. 11 Must be familiar with the ASICverification flow from feature identification to testbench development andthrough final tapeout sign-off. 12 FPGA emulation experience a plus. 13 Chip bring-up experience, including useof Logic Analyzer and Oscilloscope for debugging
芯片和Switch验证@新加坡
简历发 hr@hi-talent.com (请以英文为准) 1芯片和开关验证 2与美国团队紧密合作 3支持芯片带出并提出 要求: 1 5年以上ASIC验证的经验。 电气工程2学士学位(或同等学历)是必须的,硕士是需要的。 如802.3和TCP / IP网络协议3的工作知识 4有开关发动机验证经验。 5片上系统(SOC)的验证经验,包括AHB/AXI、CPU、接口集成验证。 6经验验证接口,如PCIe、以太网和USB,DDR。 7验证工具的经验–Verilog,System Verilog,覆盖分析。 8必须熟悉各种脚本语言用于验证,如Perl、CSH、制作,等。 9编程语言的工作知识。 10必须在Verilog RTL语言专家。 11必须熟悉特征识别测试平台开发的ASIC验证流程,通过最后的流片签字。 12 FPGA仿真经验者优先。 13芯片带来的经验,包括使用逻辑分析仪和示波器进行调试
Best Regards Jane.Jin 金娟 Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd. 上海芯得企业管理咨询有限公司 上海芯相会企业管理咨询有限公司 Mob: 18502155252 E-Mail: Jane-Jin@hi-talent.com 微信: xinde_jane QQ: 1600548210 Weibo: http://weibo.com/u/1716864892 website:
www.hi-talent.cn
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