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Cadence招聘Principal Product Engineer- library characterization Location: Shenzhen 更多职位信息敬请关注Cadence公众微信平台:Cadence微招聘 If you haveinterest, PLS send your update CV to job_china@cadence.com Title: PrincipalProduct Engineer- library characterization Position Description: We are looking for a dynamic individual to join the Cadencelibrary characterization development group. This group is currently developing the best-in-class librarycharacterization tools for standard cells, IO cells, memories and analog /mixed signal macros. As a productengineer, you will shape our products and contribute to our marketsuccess. The product engineering team isthe "voice of the customer" within the Characterization R&D groupand is responsible for communication between R&D and sales, marketing, andapplication engineering as well as interfacing directly with majorcustomers. You will definespecifications for new characterization product features and help supportadvanced customer evaluations especially for new product roll-outs. You willwork together with R&D on implementation and development of customer testsuites. You will be responsible for reviewing product documentation, developingdemonstrations and training as well as writing application notes and technicalwhite papers. PositionRequirements: 1.
BS plus 5+ years’ experience in Librarycharacterization with knowledge of Tcl, Shell Scripting (sh, csh, AWK etc.) andexcellent communication skills. Detailedknowledge of Liberty ™ Library data formats (NLM, CCS and ECSM) and transistorlevel (spice) simulation is required for this position. Familiarity with static timing analysis isdesired. We prefer candidates withexperience in: 2.
Transistor circuit simulation and analysis usingSpectre, Finesim, and/or Hspice 3.
Memory simulation and analysis usingSpectre_XPS, Finesim_Pro and/or XA 4.
Static timing, signal integrity and poweranalysis tools (Tempus/ETS/Voltus/PrimeTime/PT-PX), 5.
Standard cell, and IO/IP characterization andvalidation 6.
Digital Design 7.
Mixed signal design with knowledge of VirtuosoADE 8.
Design and simulation of large mixed signalblocks such as PLL, SERDES, DAC, ADC. 9.
Memory design and characterization 10.
Statistical variation simulation and modeling(Monte Carlo analysis) including LVF and AOCV |