Cadence 上海招聘Lead/Senior Front-end Design Engineer

springyang

Cadence 上海招聘Lead/Senior Front-end Design Engineer，有意者请将简历发至541515639@qq.com.
Position Description:
 Deliver/implement DDR/HBM IP. The engineer should be able to act as a strong team member and contributor. Exercise judgment within generally defined practices and policies.

Specific duties include:
 Proficiency in logic design, simulation, synthesis, STA and testing
 Proficiency in Verilog and its simulation environment
 Good knowledge of IC design
 At least two years’ experience driving complex IC development projects, excellent communication skills and the uncanny ability to both lead and contribute in a cooperative team environment.


Position Requirements:
 Essential Qualifications: Must have BS degree with 4+ years of applicable experience, MS degree with 2+ years of applicable experience in electrical engineering, microelectronics, comparable engineering science or solid state physics.
 Essential that the individual demonstrates strong communication, verbal and written.
 Requires good communication skills in English.
 Will have demonstrated successful completion of 5+ design projects as an individual contributor
 Familiar with JEDEC-DDR/HBM, DFI and AMBA protocols and have DDR project design experience

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