在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
EETOP诚邀模拟IC相关培训讲师 创芯人才网--重磅上线啦!
查看: 2472|回复: 7

[求助] Hunting --> High Speed Digital Design:

[复制链接]
发表于 2016-2-23 21:15:45 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
High Speed Digital Design:
Design of High Speed Interconnects and Signaling 1st Edition
by Hanqiao Zhang , Steven Krooswyk , Jeffrey Ou
Paperback: 272 pages
Publisher: Morgan Kaufmann; 1 edition (September 17, 2015)
Language: English
ISBN-10: 0124186637
ISBN-13: 978-0124186637

MK-HS-Digital-Design-Interconnects-Signaling.jpg



About the Author
Hanqiao Zhang is an Analog Engineer at Intel and holds a PhD degree in Electromagnetics and Microwave Engineering from Clemson University. Hanqiao joined Intel Xeon product electrical validation team in 2011, where he worked on generations of Intel high-speed digital systems. He developed methodologies for validating high-speed interfaces, such as PCI Express and Quick Path Interface (QPI). Hanqiao is now a signal integrity engineer with Intel Data Center Group. He is involved in mission-critical high-performance servers signal integrity design, bring up, validation and debug.

Steve Krooswyk has been at Intel since 2003 when we joined as a signal integrity engineer for EPSD server development. In 2009, Steve transitioned into the signal integrity lead for PCI Express in Intel’s Enterprise Platform Technology Division (EPTD). In addition to server products, his experience includes involvement in the PCI Express 3.0 and 4.0 specifications. He holds a B.S. and M.S. in electrical engineering from the University of South Carolina.

Jeffrey Ou joined Intel in 1999 as an analog design engineer in CMOS RF transceiver design. In 2006, Jeffrey transitioned to Xeon processor product design team in Server Development Group (SDG) developing a serial I/O module configurable for PCI Express and Quick Path Interface (QPI). Since then Jeffrey has been involved in several generations of Xeon products from design to post silicon validation. In 2012, Jeffrey was recognized as a tech lead in SDG, and continued to develop the cutting-edge high speed serial I/O modules for server products. Jeffrey holds a PhD degree in EECS from UC Berkeley and is a member of IEEE.
发表于 2016-3-8 14:30:45 | 显示全部楼层
GOOD book!
发表于 2016-3-21 19:06:59 | 显示全部楼层
亲,好像没有附件!!
发表于 2016-6-20 18:27:33 | 显示全部楼层
found the book, cant download it tough :s
发表于 2016-6-20 18:29:14 | 显示全部楼层
maybe someone can pm me a link or something
发表于 2016-9-10 13:41:58 | 显示全部楼层
thanks!
发表于 2017-5-27 11:44:15 | 显示全部楼层
waiting for sources
发表于 2017-6-17 20:11:33 | 显示全部楼层
回复 1# Jason.tschen


   good book and anyone can share ?
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /2 下一条

小黑屋| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-5-11 04:38 , Processed in 0.033985 second(s), 10 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表