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[招聘] [omnivision 社招/校招]通信算法/ASIC(物联网IOT WIFI/BLE 方向)急招

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发表于 2016-2-6 10:00:06 | 显示全部楼层 |阅读模式

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OmniVision已被土豪(中国财团)正式收购,迎来更大一轮发展契机。Omnivision 将在未来的物联网领域大露身手,借助传感器,视频音频处理等已经成熟的系统方案以及庞大的客户群体,再将物联网的connectivity一环做实做大,形成更完整的系统方案。目前Omnivision 在物联网IOT WIFI/BLE 方向急招算法和ASIC人员,待遇优厚,目前团队规模还小,正是求贤若渴时,也因此有充足的发挥平台和学习空间,绝不只是螺丝钉,让您兼享有大公司的平台和小公司的学习/发展机会。物联网即将大热,加上Omnivision充实的资本和系统整合优势,欢迎有志之士在这个方向共同努力,展露头角。无论您是在通信算法,or 通信PHY的ASIC设计 or 802.11/BLE MAC 协议方面 or soc架构/低功耗设计方面有或多或少的经验,欢迎投递简历至maggie.huang@ovt.com,从staff engineer 到应届毕业生都有需求。JD仅供参考,只要您想加入我们,不妨送来一份简历噢!

1  Staff/Senior Asic engineer

Position Overview:

The candidate will play an important role in a team of highly competent ASIC designers involved in design, verification, and implementation of advanced platform for OmniVision's future generation wireless products. He will responsible for SOC achitecture design ,Low cost and low
power
design, SOC integration and FPGA system evaluation of wireless system.


Responsibilities:

1. Be responsible for SOC system architecture, RTL coding, simulation, implementation and evaluation of wireless system solution schemes;
2. Provide guidance to engineers for IP evaluation and system integration.
2. Peform full cycle of IP development responsibilities.
3. wireless communication protocol research, performance evaluation, optimization for wireless  product engineering implementation
4. Working with project team members to contribute bluetooth&wlan SOC design to product;
5. Provide detailed block-level/top-level design and documents;
6. Develop and execute thorough simulation and lab verification plan;
7. Highly participate in the FPGA platform development and lab debugging;
8. Throughly understand the protocal conducted in hardware or firmware.
9. Communicate with engineers of various backgrounds, such as RF IC design and software

Requirements:
1. MSEE+ with above 3 years or BSEE with 5 years experience on ASIC design, or equivalent;
2. Must have good understanding of ASIC design methodology ,include design,verification,synthesis;
3. Must have track record of successful SOC designs that wire fabricated,tested and put into productions;
4. Familiarity with communications standards eg wifi, Bluetooth, FM is a plus;
5. Experienced with wireless algorithm research, design and development is a plus;
6. Experienced with low power design technology is another plus;
7. Experienced with 802.11 MAC/PHY ASIC implementation and verification is a big plus;
8. Strong verilog,PERL,TCL and Assembly programming skills;
9. Strong analytical, and problem solving skills as well as hands-on lab debugging skills;
10. Good communication skills, especially in technical writing and reporting;
11. Sensitive to the problem and good self-study and problem  shooting ability;
12. High degree of intiative and responsibility.





2  staff/senior wireless algorithm engineer

Position Overview:
The candidate will play an important role in a team of highly competent ASIC designers involved in design, verification, and implementation of advanced platform for OmniVision's future generation wireless products. He will responsible for high performance/low cost PHY layer algorithm design, system performance evaluation of wireless system.


Responsibilities:

1.Be responsible for developing receiver algorithms of the PHY layer and optimizing system performance for wireless communication designs.
2.A successful candidate should have strong industrial experience in designing digital receivers/transmitters, and have in-depth knowledge of characteristics of wireless communication systems.
3.Be required not only to work with ASIC design team on design implementation and verification, but also to have the ability to communicate with engineers of various backgrounds,such as RF IC design and software so as to develop the best architecture for cost/performance tradeoff.
4.The position also bears the responsibility of working with the other teams for performance analysis and optimization.

Requirements:
1. MSEE or PhD in Electrical Engineering with specialization in communication systems.
2. MSEE with 5+ years experience (3+ years for PhD) (design  experience in communication design with matlab/C++ ,such as  Wi-Fi, LTE ,DTMB,DVB, WiMax,ABS-S or CMMB )
3. In-depth knowledge of time/frequency SYNC, channel estimation/equalization,various modulations and related channel encoding/decoding algorithms.
4. In-depth knowledge of wireless communication for Wi-Fi (802.11 b/g/n/ac), and/or Bluetooth is a plus.
5. Good experience in link budget analysis and system performance optimation of system link including RF/AFE/Digital is highly desirable.
6. Strong insight into system performance requirements and design tradeoffs; Ability of modeling RF and analog domain non-idealities with digital compensation techniques to combat these issues is required.
7.Excellent communication skills, be able to take ownership and work under pressure, must be a team player
8. Sensitive to the problem and good self-study and problem  shooting ability;
9. High degree of intiative and responsibility.




3  校招  ASIC Design engineer
Responsibilities:

1. Be responsible for RTL coding, simulation and implementation;
2. wireless communication protocol research, performance evaluation, design optimization;
3. Working with project team members to contribute bluetooth&wlan SOC design to product;
4. Provide detailed block-level implementation and documentation;
5. Develop and execute thorough simulation and lab verification plan;
6. Participate in the FPGA platform development and lab debugging;

Requirements:

1. Familiar with verilog, VHDL;
2. Familiar with  communication system and algorithms, design implementation;
3. Familiar with 802.11 protocol is a big plus;
4. Good knowledge of communication theory is a big plus.
4. Strong analytical, and problem solving skills as well as hands-on lab debugging skills;
5. Good communication skills, especially in technical writing and reporting;
6. Self-motivated and ability to excel in a team environment;


4 校招 wireless algorithm engineer


Responsibilities:
1.Be responsible for developing transmitter/receiver algorithms of the PHY layer and optimizing system performance for wireless communication designs.
2.A successful candidate should have  in-depth knowledge of characteristics of communication systems.
3.You are required  to support ASIC design team on design implementation and verification.
4.The position also bears the responsibility of lab performance test and debugging.


Requirements:
1. MSEE or PhD in Electrical Engineering with specialization in communication systems.
2. In-depth knowledge of time/frequency SYNC, channel estimation/equalization,various modulations and related channel encoding/decoding algorithms.
3. Familiar with Matlab and C++;
4. In-depth knowledge of wireless communication for Wi-Fi (802.11 b/g/n/ac), and/or Bluetooth is a plus.
5. Excellent communication skills, especially in technical writing and reporting;
6. Be able to take ownership and work under pressure, must be a team player;
7. Sensitive to the problem and good self-study and problem  shooting ability;
8. High degree of intiative and responsibility.
 楼主| 发表于 2016-2-14 08:59:03 | 显示全部楼层
机会难得,简历都投来把
 楼主| 发表于 2016-2-14 10:54:46 | 显示全部楼层
对于工程师来说是个绝好的历练平台
发表于 2016-2-15 12:06:13 | 显示全部楼层
顶一下,快来投简历。
发表于 2016-2-18 08:51:50 | 显示全部楼层
继续顶,欢迎大牛们加入。
发表于 2016-2-18 09:50:04 | 显示全部楼层
回复 5# sailorchu


    为什么约了面试,确没有联系,这是什么情况?
发表于 2016-2-18 14:00:48 | 显示全部楼层
回复 6# chineselboy


    什么情况呢?当时HR怎么说的。
发表于 2016-2-18 14:10:33 | 显示全部楼层
回复 7# sailorchu


    谢谢  已经收到hr的电话了,
发表于 2016-2-22 16:55:36 | 显示全部楼层
继续顶。。。。
发表于 2016-3-4 09:05:03 | 显示全部楼层
继续顶
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