【NVIDIA社招】英伟达上海热招Power Estimation Engineer

NVHR

【NVIDIA社招】英伟达上海热招Power Estimation Engineer

一．公司简介

       NVIDIA (英伟达™)(www.nvidia.cn)公司(纳斯达克代码：NVDA)是全球视觉计算技术的行业领袖及GPU(图形处理器)的发明者。作为高性能处理器的GPU可在工作站、个人计算机、游戏机和移动设备上生成令人叹为观止的互动图形效果。公司在全球拥有超过8000名员工，总部在加利福尼亚州圣克拉拉。

工作地址：上海研发中心【上海申江路5709号（秋月路26号）矽岸国际2号楼】

二．投递方式

感兴趣请的请将简历发送至：yvettes@nvidia.com；邮件注明“BBS”

我们会认真对待每份简历，保证每份简历都有是否通过简历筛选的回复。同时欢迎随时电话或邮件咨询职位详情，申请进度等等：021-61043660

三．职位详情

PowerEstimation and Modeling Engineer
In this role you will be responsible for architecting/developing/correlatingPower Estimation Models/Tools for NVIDIA's GPU/Tegra chips. You will beinterfacing with design teams to understand architecture level features, createand update power models and power tool features, and help to meet theorganizational needs from management.

RESPONSIBILITIES:

- Architect anddevelop Power Estimation Models for Dynamic use-case, Leakage, and IO Powerestimation. Design the tools based on these models and develop solid testingmethodology/infrastructures.
- Interface/Coordinate with internal teams and external teams in the US andIndia that provides necessary input data to develop the estimation models andtools.
- Interface with the architecture/management team to discuss requirements,solutions/methodologies and priorities, including the following:

* Translatehigher level feature requests for Power estimation tool to executable tasks forthe team; come up with verification plan and schedule.
* Steer the execution to meet the schedule and do periodic well quality-assuredtool release.
- Correlate/Calibrate these models using measured Silicon data.
- Help study/contribute to Perf/Watt improvement ideas for GPU/Tegraproductions.

MINIMUM REQUIREMENTS:
- MSEE/MSCE, preferably PhD, with specialization/experience related toPower/Performance estimation techniques.
- Fluent oral and written English to communicate with remote sites like India,US

- 2+ years of experienceof ASIC design. Working experience of any power estimation techniques, flowsand algorithms is a big plus.
- Understands power basics including transistor-level leakage/dynamiccharacteristics of VLSI circuits is a plus.
- Familiarity with low power design techniques such as multi VT, Clock gating,Power gating, and Dynamic Voltage-Frequency Scaling (DVFS) etc. is desirable.
- Good software programming skills. Python/Perl/C++ preferred. Good skills withobject oriented programming and design.
- Good Understanding of mathematical optimization techniques is desirable.
- Power analysis EDA tools such as PTPX/EPS experience is a plus.

BestRegards,

YvetteShen

APACStaffing Team

NVIDIASHANGHAI

Building 2, No. 5709 ShenjiangRoad (No.26 Qiuyue Road)  201210.

Tel+(86 21) 61043660

yvettes@nvidia.com