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Job Location: Shanghai Work for large scale ASIC chip delivery in the field of power grid design and power integrity analysis and sign-off. Including vector and vectorless based IR, power EM, signal EM analysis, ramp up analysis and memory/macro current/cap modeling. 1.
MSEE with 2+ years or Bachelor with 5+ years of industrial experience in ASIC design 2.
Successfully gone through several complete product development cycles 3.
Good listening, writing and speaking English, Good communication skills, strong interpersonal skills and the flexibility 4.
Dedicated, hardworking and good team player 5.
Familiar with Redhawk is must [url=mailto:有意者请将简历发送至zoe.yu@amd.com]有意者请将简历发送至zoe.yu@amd.com[/url]和nicole.yu@amd.com,标题请注明应聘职位。谢谢! |