上海外资芯片设计公司急招2~5年的模拟Layout工程师

江南的小镇

有兴趣的可以发简历到email: david-chen@kthr.com，谢谢
Analog Layout Design Engineer

Description:
1. Full custom analog layout/verification and RC extraction.
2. Perform block level layout. Conduct physical verification (DRC and LVS using Cadence tools).
3. Team work with analog designers, optimize layout.

Qualification:
1. Bachelor or above degree with 2~5 years experiences in CMOS IC full-custom layout.
2. Experiences in Mixed signal/analog/highspeed layout，SerDes、ADDA、PLL，etc.
3. Familiar with layout skills and knowledge is must.
4. Good teamwork/communication/positive is must.
5. Familiar with Cadence IC layout and verification tools
6. Having massive IP block experience
7. Familiar with below 40nm CMOS process and design rule is a plus.
8. Familiar with ESD/Latch up and related layout solutions is a plus.
9. Familiar with rule deck is a plus.

sir_xia

什么公司

xxelement

请问在什么地方？

江南的小镇

回复 3# xxelement


  工作地点在上海的浦东，欢迎投简历申请，谢谢！：）

江南的小镇

回复 2# sir_xia


   欢迎投简历申请，谢谢！：）

sir_xia

公司名字？