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有兴趣的同学,将简历投递至harryf@nvidia.com 所有职位都是base在上海 Compute Architect Intern JobDescription/Qualifications: The NVIDIA GPUComputing Architecture group is seeking intern candidates with backgrounds incomputer architecture and compute science to join our effort to advance thestate of parallel computing. Our team is designingthe fastest and most efficient parallel architectures that powerenergy-efficient smart phones and the world's fastest super computers.
RESPONSIBILITIES: Develop innovativeHW, DSP, GPU and system architectures to extend the state of the art inperformance, programmability, efficiency and reliability Analyze and prototypekey algorithms for new GPU architectures Collaborate acrossthe company to guide the direction of GPU computing, working with software,research and product teams
DESIRED SKILLS andEXPERIENCE: MS Degree in relevantdiscipline (CS, EE, Math). PhD helpful Strong programmingskills in C or C++ Strong background incomputer architecture, compilers, parallel processing, signal processing and/orhigh performance computing (optional) Strongprogramming skills in CUDA, Perl, OpenMP, MPI or Python is big plus (optional) Experiencein computer vision, machine learning, and molecular dynamics is big plus _________________________________________________________________________ ASICIntern
JobDescription/Qualifications: - BS/MS inelectrical/computer engineering and related. - Good skills inVerilog. Solid understanding in RTL sim verification of digital design. - Perl scriptingskills is appreciated as a plus. - Fluent English(both written and spoken) and excellent communication skills - Demonstratedability to work independently as well as in a multi-disciplinary groupenvironment ______________________________________________________________________________ ASICdesign/verification intern
JobDescription/Qualifications: - BS/MS inelectrical/computer engineering and related. - Good skills inVerilog. Solid understanding in RTL sim verification of digital design. - Perl scriptingskills is appreciated as a plus. - Database/Web designexperience is appreciated as strong plus. - Fluent English(both written and spoken) and excellent communication skills - Demonstratedability to work independently as well as in a multi-disciplinary groupenvironment ______________________________________________________________________________ ASICIntern
Job Description/Qualifications: - Maintain regression suit, triage failing tests - Improve wiki page and user documents - Maintain infrastructure and tree ______________________________________________________________________________ PhysicalDesign Engineer Responsible for flowautomation, regression test. Analysis onplacement, routing, timing, clock, power, noise and DFM. On-demand testingsupport and infrastructure coding in perl/tcl/makefile/java. Minimum Requirement: MSEE Basic knowledge ofdevice model, processing technology, timing, noise and power in chip design. Proficient user ofPerl or TCL ( or C, Python) is preferred. Hands-on experiencein EDA software from Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter)is a plus.
CUDA Automation Triage QA Engineer
Job Description/Qualifications: Job description: - GPU Computing test with CUDA to ensurefunctionality, compatibility and performance. - Test staging area cuda enabled displaydriver and CUDA toolkit. - Report and analyze the nightlyfailures from CUDA nightly testing. - Maintain and fix bug for CUDA nightlytesting configuration files.
Qualifications: - A good degree from a leadinguniversity in an engineering or computer science related discipline (BS; MS orPhD preferred). - Familiar with Linux and Windowsoperating systems. - Be good at C/C++ and pythonprogramming a plus. - Good trouble shooting, analyticalskill, logical thinking and inferences capability a must. - Excellent English communication andcollaboration skills. - Ability to work independently andachieve results on tight time lines. ___________________________________________________________________________ System Design Engineer - GPU Arch
Job Description/Qualifications: Responsibilities: - We are looking for world classengineers to design, model, analyze and verify next generations of GPUarchitecture. - The candidates will work with a groupof architects to design and develop proprietary internal tools for thevisualization, analysis, and debug and verification of tests and applicationson various functional and performance simulations of future chips. - The candidates will have opportunitiesto get involved in cutting-edge GPU macro- and micro-architecture design,verification and optimization, including porting commercial applications totest benches, identifying performance hotspots and data mining for performanceanalysis.
Requirements: - Bachelor Degree or higher majoring inCS/EE/Mathematics or relevant fields. - Solid computer science background - Strong C/C++ programming ability. - Excellent English writing forengineering documentation, English oral well enough to attend meetings. - Experience in the following areas is aplus: - Scripting language (Perl, Python,Ruby) experience is a plus. - 3D graphics (D3D or OpenGL)application development. - Parallel computing/CUDA/OpenCL/HPCdevelopment. - Microprocessor architecture design& verification. - System level programming experience inOS, compiler, driver, tools, virtual memory system, etc. - Multimedia (video, image processing,visualization) application development
Developer Tools QA software engineer
JobDescription/Qualifications: Qualifications: The candidatewill take the responsibility to test our software distributions that includesmobile/embedded OS, SDK, compilers and samples codes.
- Strong knowledge onWindows and Linux Operating systems - Knowledge on buildtools like Make and ant - Strong atscripting, like perl , shell and batch scripting. - Good debuggingskills and analysis skills on installations and builds - Good hands on aboutStrong analysis skills on system / product configurations and setups. - Added advantagewith C,C++
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Power ASIC Engineer Intern(2017)
Power methodologyteam is responsible for researching power expenditures and workload efficiencyto identify architectural, micro-architectural strategies to improve powerefficiency of the next generation GPU and TEGRA chips.
Responsibilities: Develop the powerflow to automate the power expenditures measurement. Evaluate newlow-power technologies and provide feedback to power ARCH team to improve chippower efficiency on architectural level. Support GPU/TEGRA RTLdesigners using the power flow to do the power scrubbing work and improve theirpower efficiency on micro-arch level. Understand andperform block level and chip-level power analysis.
Requirements: Experience on ASICrelated areas like ASIC design/verification. Knowledge on advancedlow power techniques and high speed clocking desired. Knowledge on lowpower ASIC design/verification. Programminglanguages: Strong Verilog (or VHDL), Perl, Tcl is must, C ++ is a plus. Tool FamiliarityTPX, Synopsys Design Compiler, VCS simulation tool is must, Power Artist is aplus. Excellentcommunication skills and ability to be good at teamwork. Excellent Englishwriting/speaking skills.
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