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[招聘] Sr./MTS ASIC Design Verification Engineer

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发表于 2015-11-16 16:33:15 | 显示全部楼层 |阅读模式

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AMD北京研发中心热招Sr./MTS ASIC Design Verification Engineer,请感兴趣的候选人把简历以附件形式发送到maggie1.zhang@amd.com , 请注明应聘职位并在正文称述应聘理由与优势。

Sr./MTS ASIC Design Verification Engineer

Job description:
We are currently looking for engineer who will be responsible for design verification of cutting edge GPU projects. Qualified candidate will participate in all SoC level function verification jobs including:
1.        SoC DV testbench and infrastructure development and maintenance
2.        Create and execute SoC testplan including data-path and interrupt, virtualization, security, power management, etc.
3.        Implement directed and random test cases in C++/SV, as well as checkers and assertions
4.        Support integration and qualification of all the IPs for SoC
5.        Help to improve DV environment building flow

Requirement:
-   MS with 3+ or BS with 5+ years’ experience in ASIC/SoC design verification
-   Hand-on experience of complex ASIC DV flow from plan to coverage
-   knowledgeable in C++ & SV development, familiar with scripting languages like Ruby/Perl/Makefile…
-   Strong problem solving and communication skills
-   Knowledge on computer architecture and PCIe devices is preferred
-   Good knowledge on verification methodologies like UVM is a big plus
-   Experience in power-aware verification is an asset
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