Job description
-Perform block level analog layout, including Bandgap, PLL, LDO, OPAMP, ADC/DAC.
-Perform verification (LVS/DRC/ANT etc) of layout.
-Assist in top level layout.
Requirement
-BSEE or related engineering degree.
-2+ years CMOS IC custom layout experience.
-Familiar with Cadence and Calibre design flow.
-Experience in basic analog block layout is a plus.
-Team working skill is a plus.