在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 1538|回复: 1

[招聘] 【实习】AMD上海招聘DFX design verification intern

[复制链接]
发表于 2015-7-29 15:56:28 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
Job Summary:
DFT intern of cutting edge GPU projects

Job Responsibilities:
Participate in chip level DFT feature and architecture definition
Responsible for DFT specification generation and review
Implement DFT features including SCAN, Boundary SCAN, MBIST, Analog Macro test logic and etc.
Perform verification on all DFT structures
Generate DFT related timing constraints and work with PD team for timing closure
Generate and verify DFT structural patterns and functional patterns
Participate in ATE bring-up and debug the DFT patterns on ATE
Design and implement other DFX (debug, characterization, yield and etc.) logics

Job Requirements:
Familiar with entire ASIC design flow
Strong problem solving skills
Good written and oral English
Good communication skills
Hands on experience on ASIC DFT design and verification preferred

实习要求半年到一年,最少半年,每周3-4天出勤,符合条件的同学请将简历发送至Maggie1.Zhang@amd.com,邮件主题请以姓名-学校-年级-应聘职位-可实习时长-每周出勤时长为题,谢谢。
发表于 2015-11-28 21:24:47 | 显示全部楼层
还招吗
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2025-7-15 01:26 , Processed in 0.019746 second(s), 10 queries , Gzip On, MemCached On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表