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[高薪急聘] RFIC设计人员 (美资,上海)

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发表于 2006-6-21 11:18:25 | 显示全部楼层 |阅读模式

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Job titles:
Design Manager on PLL System
Job description:
RFIC design mainly on PLL System:  
- Managing a PLL design team and developing PLL design competency.  
- Responsible for mentoring junior engineers and providing recommendations on design, layout and test methodologies.
- Plan, analyze, design, simulate, verify, document and release to production PLLs for wireless applications.
- Integer/Fractional PLL system simulation, design and development.
- Assist in development of production test.
Job Requirements:
Person Specification:
- MSEE or PhD in EE, plus at least 5 years of hands-on PLL design experience with a good track record.
- In-depth understanding of phase noise mechanism in a PLL system, sigma-delta theory.
- Experience in spur compensation, current matching, integrated LPF technique, noise shaping etc. is necessary.
- Previous experiences in WCDMA, GSM/GPRS cellular, 802.11x WLAN, Bluetooth and PHS are plus.
- Strong RFIC design skills, hands-on testing and diagnostics-related RF measurement experience and familiarity with CAD tools including Cadence Spectre, SpectreRF, Virtuso, ADS, Matlab, etc. - Outstanding leadership and communication skills.
- Self-motivated attitude and excellent team spirit.
- Strong problem solving skills.
- Fluent English communications
 楼主| 发表于 2006-6-21 11:19:15 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
RFIC PA Design Manager
Job description:
RFIC design mainly on PA/Class-D Amp:  
- Managing a PA design team and developing PA design competency.  
- Responsible for mentoring junior engineers and providing recommendations on design, layout and test methodologies.
- Plan, analyze, design, simulate, verify, document and release to production PAs for wireless applications.
- Linear PA design and development.
- Assist verification team to design PCB board for chip testing.
- Assist in development of production test.
Job Requirements:
Person Specification:
- MSEE or PhD in EE, plus at least 5 years of hands-on PA design experience with a good track record.
- Hands-on design experiences on high efficiency, high linear PAs with high output power, etc. Experience on UMTS/WCDMA/TD-SCDMA/GSM/EDGE/WLAN PA is a plus.
- In-depth understanding of semiconductor device, microwave theory.
- Experience in PA/RFIC design using one or more of the following processes: GaAs, SiGe BiCMOS, or RFCMOS.
- Class-D amplifier design experience is a plus.
- Knowledge of PA circuit design techniques, design for testability and manufacturability.
- Strong RFIC/Microwave design skills, hands-on testing and diagnostics-related RF measurement experience and familiarity with CAD tools including Cadence Spectre, SpectreRF, Virtuso, ADS, Sonnet, Ansoft, etc.
- Outstanding leadership and communication skills.
- Self-motivated attitude and excellent team spirit.
- Strong problem solving skills.
 楼主| 发表于 2006-6-21 11:19:37 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
RFIC Power Management Design Manager
Job description:
RFIC design mainly on power management:
- Managing a power management design team and developing power management design competency.  
- Responsible for mentoring junior engineers and providing recommendations on design, layout and test methodologies.
- Plan, analyze, design, simulate, verify, document and release to production Regulators for wireless applications.
- Linear LDO and DC-DC converter design and development.
- Assist in development of production test.
Job Requirements:
Person Specification:
- MSEE or PhD in EE, plus at least 5 years of hands-on power management design experience with a good track record. - Hands-on design experiences on high efficiency regulators.
- In-depth understanding of semiconductor device and analog design.
- Knowledge of regulator design for testability and manufacturability.
- Strong analog design skills and familiar with CAD tools including Cadence Spectre, SpectreRF, Virtuso, etc.
- Outstanding leadership and communication skills.
- Self-motivated attitude and excellent team spirit.
- Strong problem solving skills
- Fluent English communications
 楼主| 发表于 2006-6-21 11:19:57 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
Sr. RF Architecture Engineer
Job description:
新射频架构开发;
电路行为模型建模;
射频子系统行为级仿真;
Job Requirements:
5年以上通信用射频系统设计经验;
有较强的电磁场与微波技术理论知识;
有较强的随机信号分析理论知识;
 楼主| 发表于 2006-6-21 11:22:39 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
RFIC Modeling Design Manager
Job description:
RFIC design mainly on device modelling:  
- Device modelling including ESD devlices, MOS transistors, RAM/ROM devices, inductors, transformers, substrate, package etc.
- Responsible for mentoring junior engineers and providing recommendations on design, layout and test methodologies.
- Build up/maintain company core device libraries.
- Support whole design team for good design competency.
Job Requirements:
Person Specification:
- MSEE or PhD in EE, plus at least 5 years of hands-on device modelling experience with a good track record.
- In-depth understanding of semiconductor device, microwave theory.
- Hands-on device characterization and diagnostics-related RF measurement experience and familiarity with CAD tools including Cadence Spectre, SpectreRF, Virtuso, ADS, Sonnet, Ansoft, Matlab, Medici etc.
- Outstanding leadership and communication skills.
- Self-motivated attitude and excellent team spirit.
- Strong problem solving skills.
 楼主| 发表于 2006-6-21 11:23:21 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
RFIC Filter Design Manager
Job description:
RFIC design mainly on Filter:  
- Managing a filter design team and developing filter design competency.  
- Responsible for mentoring junior engineers and providing recommendations on design, layout and test methodologies.
- Gm-C/Switch-cap filter design with auto-center frequency and Q calibration.
- Cover other key analog blocks such as bandgap, opamp design also.
Job Requirements:
Person Specification:
- MSEE or PhD in EE, plus at least 5 years of hands-on analog filter/Switch-cap design experience with a good track record.
- In-depth understanding of semiconductor device, filter design theory.
- Knowledge of filter design for testability and manufacturability.
- Previous experiences in GSM/GPRS cellular, 802.11x WLAN, Bluetooth and PHS are plus.
- Strong RFIC design skills and familiarity with CAD tools including Cadence Spectre, SpectreRF, Virtuso, Ocean, Verilog, etc.
- Outstanding leadership and communication skills.
- Self-motivated attitude and excellent team spirit. - Strong problem solving skills.
 楼主| 发表于 2006-6-21 11:24:03 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
RFIC Design Engineer (on TX FE design)
Job description:
RFIC design, mainly focus on the TX FE design, including the up-mixer, PA-driver, etc.
Job Requirements:
Person Specification:
- MSEE or PHD, 1-3 year’s industry experience is preferred.
- Hands on design experience with up-mixer, VGA, PA-driver, PLL, VCO, etc. with Cadence is required.
- Knowledge about RF system, device modeling, process.
- Good English communication skills
- Self-motivated, emphasis on teamwork, schedule, plan and delivery.
 楼主| 发表于 2006-6-21 11:24:44 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

Job titles:
Design Project Manager
Job description:
Project management:
- Manage/Coordinate a project team inside the design division from architecture design to circuit design with different blocks and layout design.
- Project planning and follow-up to make sure on time delivery.
- Coordinate with Marketing team for transcevier features and architecture design
- Coordinate with system application dept. for chip evaluation and application.
- Support production team to prepare for MP.
- Support the project up to mass production.
Job Requirements:
Person Specification:
- MSEE or PhD in EE, plus at least 5 years of hands on transceiver design experience and 3 years of project management experience with a good track record on on-time delivery.
- Hands-on experiences on project management, team coordination etc.
- In-depth understanding of semiconductor device, microwave theory, circuit design, communication system.
- Experiences in different transceiver circuit block design.
- Knowledge of both anaog/RF and digital design are required. SOC experience is a big plus.
- Previous experiences in UMTS/WCDMA, GSM/GPRS cellular, 802.11x WLAN, Bluetooth and PHS are plus.
- Knowledge of transceiver design techniques, design for testability and manufacturability.
- Strong RFIC design skills, hands-on testing and diagnostics-related RF measurement experience and familiarity with CAD tools including Cadence Spectre, SpectreRF, Virtuso, ADS, Sonnet, Ansoft, Synopsys, etc.
- Outstanding leadership and communication skills
- Self-motivated attitude and excellent team spirit.
- Strong problem solving skills.
 楼主| 发表于 2006-6-21 11:27:30 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)


Digital & Software engineer
Job description:
---Chip design verification on digital circuitry;
---RF transceiver software (driver) debugging
---Customer support
Job requirements:
--- At least 5 years of working experience in mobile product development or applications engineering;
--- Familiar with digital and analog circuitry;
--- Familiar with schematic/PCB layout tools;
--- Experienced with CPLD/FPGA design flow, familiar with VHDL /Verilog;
--- Experience in telecommunication/embedded software development is preferred;
--- Knowledge and practice with consumer products is a plus;
--- Excellent written and verbal communication in English;
--- Willingness to travel.
 楼主| 发表于 2006-6-21 11:28:58 | 显示全部楼层

[高薪急聘] RFIC设计人员 (美资,上海)

RF/ANALOG IC LAYOUT ENGINEER / SENIOR ENGINEER
Responsibilities
Work closely with the RF/Analog IC designers to implement and verify layout of RF/analog circuits
IC layout design for RF/analog circuits, inc. synthesizer, mixer, ADC, LNA, filter and PA circuits
Support layout verification (LVS, DRC), post-layout extraction and floor-planning
Support matching and power bus issues
Understand and support setup of new fabrication processes/design rules
Provide quick and accurate die area estimates based on schematics
Requirements
Candidate must be familiar with CMOS layout.
Candidate should have at least 3 years’ experience in RF or analog circuit layout
Hands-on experience with Cadence toolset is preferable.
Fundamental knowledge of circuit design to communicate with design engineers.
Candidate must possess a BS/MS/PhD in Engineering (Computer, Telecommunication, Electronic or related) or equivalent
Oral and written English is required.
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