数字IC设计工程师-上海 昆山 珠海

猎头-carry

资深数字IC设计工程师-上海 昆山


Position Responsibilities:
1. RTL level coding according to the requirement from analog/system designer;
2. Develop and execute simulation and lab verification plan;

3. Participate in the FPGA platform development and lab debugging;
4. Synthesize RTL code and Place&Route layout automatically.
Position Requirements:
1. MS degree in EE/CE;
2. Good knowledge of RTL design and simulation;
3. Able to write C code to model RTL blocks for simulation and verification;
4. Able to write reusable Verilog RTL codes, follow design and DFT guidelines;
5. Able to run synthesis, static timing analysis and formal verification is  
highly desirable, but not required;
6. Experience in Cadence IC Place&Route Layout tool set;
7. 5-8 years of digital design experience;
8. Good English reading skills.

数字IC设计工程师- 珠海

职责： 数字电路设计和验证；任务： 系统架构设计和SOC系统整合 Interface电路设计和验证
任职资格：
1.计算机和微电子相关专业，硕士以上学历；
2.熟悉数字电路设计流程；
3.熟练掌握数字电路设计所需知识，如verilog用法和基本电路设计技巧；
4.熟练掌握各种设计相关EDA工具；

5.乐观积极、勇于接受挑战；

欢迎朋友自荐或推荐！

我的QQ：2860394305
电话：0755-66606920
有意者简历可发：carry.wang@yaxunhr.com

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