【AMD热招】上海Senior ASIC Engineer for FPGA Verification

RecruiterAMD

AMD上海研发中心招聘Senior asic Engineer for FPGA Verification，请感兴趣的候选人把简历以附件形式发送到nina.zhang@amd.com ,请在正文称述应聘理由与优势。

Responsibilities

Multi-media IP level verification on FPGA platform, and FPGA regression management

i. Oversees definition, design, verification, and documentation for ASIC development.

ii. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation.

iii. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.

iv. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use.

v. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. May also review vendor capability to support development.