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Description
Xilinx is seeking a Staff/Senior Analog/Mixed-Signal Design Engineer. This engineer will become a part of the advanced technology development team and will focus on state-of-the-art wireline transceiver development. The engineer will focus on design of PLL, Transmitter, and Receiver blocks for low power and high performance, for embedding into leading edge FPGAs. Additional responsibilities include simulation coverage for optimization and ensuring robustness to process variations and secondary process effect.
Qualifications
This position requires a strong background in high-speed analog/mixed-signal circuit design, and a minimum of 3 years experience with design and verification methodologies in advanced processes. The successful candidate will have test and debug experience for design validation, as well as outstanding interpersonal, communication, presentation, and teamwork skills.
Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to age, race, gender, religion, marital status and family responsibilities, disability or sexual orientation.
内推,简历发EMAIL: hzha@xilinx.com |
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